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參數(shù)資料
| 型號(hào)： | AM50DL128CG85IS |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 存儲(chǔ)器 |
| 英文描述： | 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA88 |
| 封裝： | 11.60 X 8 MM, FBGA-88 |
| 文件頁數(shù)： | 35/63頁 |
| 文件大?。?/td> | 464K |
| 代理商： | AM50DL128CG85IS |
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34
Am50DL128CG
November 7, 2002
P R E L I M I N A R Y
Table 12.
Write Operation Status
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits.
Refer to the section on DQ5 for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
details.
3. When reading write operation status bits, the system must always provide the bank address where the Embedded Algorithm
is in progress. The device outputs array data if the system addresses a non-busy bank.
Status
DQ7
(Note 2)
DQ7#
0
DQ6
Toggle
Toggle
DQ5
(Note 1)
0
0
DQ3
N/A
1
DQ2
(Note 2)
No toggle
Toggle
RY/BY#
0
0
Standard
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspend
Mode
Erase-Suspend-
Read
Erase
Suspended Sector
Non-Erase
Suspended Sector
1
No toggle
0
N/A
Toggle
1
Data
Data
Data
Data
Data
1
Erase-Suspend-Program
DQ7#
Toggle
0
N/A
N/A
0
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相關(guān)代理商/技術(shù)參數(shù) |
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| AM50DL128CG85IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
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| AM50DL128CH_04 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Two Am29DL640G 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories |
| AM50DL128CH56IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Two Am29DL640G 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories |
| AM50DL128CH56IT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:STACKED MULTI-CHIP PACKAGE (MCP) FLASH MEMORY AND SRAM |
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