參數(shù)資料
型號(hào)： AM50DL128CG85IS
廠商： ADVANCED MICRO DEVICES INC
元件分類： 存儲(chǔ)器
英文描述： 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA88
封裝： 11.60 X 8 MM, FBGA-88
文件頁(yè)數(shù)： 24/63頁(yè)
文件大?。?/td> 464K
代理商： AM50DL128CG85IS
November 7, 2002
Am50DL128CG
23
P R E L I M I N A R Y
Table 7.
CFI Query Identification String
Table 8.
System Interface String
Addresses
(Word Mode)
Data
Description
10h
11h
12h
0051h
0052h
0059h
Query Unique ASCII string “QRY”
13h
14h
0002h
0000h
Primary OEM Command Set
15h
16h
0040h
0000h
Address for Primary Extended Table
17h
18h
0000h
0000h
Alternate OEM Command Set (00h = none exists)
19h
1Ah
0000h
0000h
Address for Alternate OEM Extended Table (00h = none exists)
Addresses
(Word Mode)
Data
Description
1Bh
0027h
V
CC
Min. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Ch
0036h
V
CC
Max. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Dh
0000h
V
PP
Min. voltage (00h = no V
PP
pin present)
1Eh
0000h
V
PP
Max. voltage (00h = no V
PP
pin present)
1Fh
0004h
Typical timeout per single byte/word write 2
N
μs
20h
0000h
Typical timeout for Min. size buffer write 2
N
μ
s (00h = not supported)
21h
000Ah
Typical timeout per individual block erase 2
N
ms
22h
0000h
Typical timeout for full chip erase 2
N
ms (00h = not supported)
23h
0005h
Max. timeout for byte/word write 2
N
times typical
24h
0000h
Max. timeout for buffer write 2
N
times typical
25h
0004h
Max. timeout per individual block erase 2
N
times typical
26h
0000h
Max. timeout for full chip erase 2
N
times typical (00h = not supported)
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