參數(shù)資料
型號： AM42DL6404G85IS
廠商： SPANSION LLC
元件分類： 存儲器
英文描述： Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA73
封裝： 8 X 11.60 MM, FBGA-73
文件頁數(shù)： 4/61頁
文件大?。?/td> 567K
代理商： AM42DL6404G85IS
March 20, 2002
Am42DL6404G
3
P R E L I M I N A R Y
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
MCP Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . 5
flash memory Block Diagram . . . . . . . . . . . . . . . . 6
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . 7
Special Package Handling Instructions ....................................7
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
MCP Device Bus Operations . . . . . . . . . . . . . . . . 10
Table 1. Device Bus Operations—Flash Word Mode, CIOf = V
IH
... 10
Table 2. Device Bus Operations—Flash Byte Mode, CIOf = V
....11
Flash Device Bus Operations . . . . . . . . . . . . . . . 12
Word/Byte Configuration ........................................................12
Flash Requirements for Reading Array Data ..........................12
Writing Commands/Command Sequences ............................12
Accelerated Program Operation ..........................................12
Autoselect Functions ...........................................................12
Simultaneous Read/Write Operations with Zero Latency .......12
Standby Mode ........................................................................13
Automatic Sleep Mode ...........................................................13
RESET#: Hardware Reset Pin ...............................................13
Output Disable Mode ..............................................................13
Table 3. Am29DL640G Sector Architecture ....................................14
Table 4. Bank Address ....................................................................17
Table 5. SecSi
Sector Addresses ...............................................17
Sector/Sector Block Protection and Unprotection ..................18
Table 6. Am29DL640G Boot Sector/Sector Block Addresses for Pro-
tection/Unprotection ........................................................................18
Write Protect (WP#) ................................................................19
Table 7. WP#/ACC Modes ..............................................................19
Temporary Sector Unprotect ..................................................19
Figure 1. Temporary Sector Unprotect Operation........................... 19
Figure 2. In-System Sector Protect/Unprotect Algorithms.............. 20
SecSi
(Secured Silicon) Sector
FlashMemoryRegion ............................................................21
Hardware Data Protection ......................................................21
Low V
CC
Write Inhibit ...........................................................21
Write Pulse
“
Glitch
”
Protection ............................................22
Logical Inhibit ......................................................................22
Power-Up Write Inhibit .........................................................22
Common Flash Memory Interface (CFI) . . . . . . .22
Table 8. CFI Query Identification String.......................................... 22
System Interface String................................................................... 23
Table 10. Device Geometry Definition............................................ 23
Table 11. Primary Vendor-Specific Extended Query...................... 24
Flash Command Definitions . . . . . . . . . . . . . . . . 25
Reading Array Data ................................................................25
Reset Command .....................................................................25
Autoselect Command Sequence ............................................25
Enter SecSi
Sector/Exit SecSi Sector Command Sequence ..
25
Byte/Word Program Command Sequence .............................26
Unlock Bypass Command Sequence ..................................26
Figure 3. Program Operation.......................................................... 27
Chip Erase Command Sequence ...........................................27
Sector Erase Command Sequence ........................................27
Erase Suspend/Erase Resume Commands ...........................28
Figure 4. Erase Operation.............................................................. 28
Table 12. Am29DL640G Command Definitions.............................. 29
Write Operation Status . . . . . . . . . . . . . . . . . . . . 30
DQ7: Data# Polling .................................................................30
Figure 5. Data# Polling Algorithm.................................................. 30
RY/BY#: Ready/Busy# ............................................................31
DQ6: Toggle Bit I ....................................................................31
Figure 6. Toggle Bit Algorithm........................................................ 31
DQ2: Toggle Bit II ...................................................................32
Reading Toggle Bits DQ6/DQ2 ...............................................32
DQ5: Exceeded Timing Limits ................................................32
DQ3: Sector Erase Timer .......................................................32
Table 13. Write Operation Status ...................................................33
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 34
Figure 7. Maximum Negative OvershootWaveform...................... 34
Figure 8. Maximum Positive OvershootWaveform........................ 34
Flash DC Characteristics . . . . . . . . . . . . . . . . . . 35
CMOS Compatible ..................................................................35
Figure 9. I
CC1
Current vs. Time (Showing Active and
AutomaticSleepCurrents)............................................................. 37
Figure 10. Typical I
vs. Frequency............................................ 37
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 11. Test Setup.................................................................... 38
Figure 12. Input Waveforms and Measurement Levels................. 38
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 39
SRAM CE#s Timing ................................................................39
Figure 13. Timing Diagram for Alternating
Between SRAM to Flash................................................................ 39
Flash AC Characteristics . . . . . . . . . . . . . . . . . . 40
Read-Only Operations ...........................................................40
Figure 14. Read Operation Timings............................................... 40
Hardware Reset (RESET#) ....................................................41
Figure 15. Reset Timings............................................................... 41
Word/Byte Configuration (CIOf) ..............................................42
Figure 16. CIOf Timings for Read Operations................................ 42
Figure 17. CIOf Timings for Write Operations................................ 42
Erase and Program Operations ..............................................43
Figure 18. Program Operation Timings.......................................... 44
Figure 19. Accelerated Program Timing Diagram.......................... 44
Figure 20. Chip/Sector Erase Operation Timings.......................... 45
Figure 21. Back-to-back Read/Write Cycle Timings...................... 46
Figure 22. Data# Polling Timings (During Embedded Algorithms). 46
Figure 23. Toggle Bit Timings (During Embedded Algorithms)...... 47
Figure 24. DQ2 vs. DQ6................................................................. 47
Temporary Sector Unprotect ..................................................48
Figure 25. Temporary Sector Unprotect Timing Diagram.............. 48
Figure 26. Sector/Sector Block Protect and
Unprotect Timing Diagram............................................................. 49
Alternate CE#f Controlled Erase and Program Operations ....50
Figure 27. Flash Alternate CE#f Controlled Write (Erase/Program)
OperationTimings.......................................................................... 51
Read Cycle .............................................................................52
Figure 28. SRAM Read Cycle
—
Address Controlled...................... 52
Figure 29. SRAM Read Cycle........................................................ 53
Write Cycle .............................................................................54
Figure 30. SRAM Write Cycle
—
WE# Control................................ 54
Figure 31. SRAM Write Cycle
—
CE1#s Control............................. 55
Figure 32. SRAM Write Cycle
—
UB#s and LB#s Control............... 56
Flash Erase And Programming Performance . . 57
相關(guān)PDF資料
PDF描述
AM42DL6404G85IT Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM42DL640AH70IS 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM
AM42DL640AH70IT 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM
AM42DL640AH85IS 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM
AM42DL640AH85IT 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM42DL6404G85IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM
AM42DL6408G70I 制造商:Spansion 功能描述:64M (X8/X16) FLASH, 8M (X16) SRAM, 3V, FBGA73, IND - Trays
AM42DL640AG 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM
AM42DL640AG25IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM
AM42DL640AG30IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM
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