參數(shù)資料
型號: AM30LV0064DJ40E2IT
廠商: ADVANCED MICRO DEVICES INC
元件分類: PROM
英文描述: 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Flash Memory with UltraNAND Technology
中文描述: 8M X 8 FLASH 3V PROM, 35 ns, PDSO40
封裝: MO-024AC, TSOP2-44/40
文件頁數(shù): 3/41頁
文件大小: 1067K
代理商: AM30LV0064DJ40E2IT
Publication#
22203
Issue Date:
October 19, 2004
Rev:
C
Amendment/
+4
Refer to AMD’s Website (www.amd.com) for the latest information.
Am30LV0064D
64 Megabit (8 M x 8-Bit)
CMOS 3.0 Volt-only Flash Memory with UltraNAND Technology
DISTINCTIVE CHARACTERISTICS
Single power supply operation
— Full voltage range: 2.7 to 3.6 volt read, erase, and
program operations
— Separate V
CCQ
for 5 volt I/O tolerance
Automated Program and Erase
— Page program: 512 + 16 bytes
— Block erase: 8 K + 256 bytes
Block architecture
— 8 Kbyte blocks + 256 byte spare area
(separately erasable, readable, and programmable)
— 512 byte page + 16 byte spare area for ECC and other
system overhead information
Fast read and program performance (typical values)
— Read: < 7 μs initial, < 50 ns sequential
— Program: 200 μs (full page program at 400 ns/byte)
— Erase: < 2 ms/8 Kbyte block
Pinout and package
— Industry Standard NAND compatible pinout with 8-bit
I/O bus and control signals
— TSOP-II 44/40 pin package (standard and reverse)
with copper lead frame for higher reliability
— 40-ball FBGA package provides higher reliability and
“packing density”
Command set
— Basic Command set: Read Data, Read ID, Read
Status, Input Data, Program Data, Block Erase, Reset
— Superset Commands: Gapless Sequential Read
Data, Erase Suspend/Resume
Operation status byte
— Provides a software method of detecting program or erase
operation completion, program/erase pass/fail condition,
erase suspend status, and the write protect status
Operating current (typical)
— Read: 10 mA (sequential)
— Program: 10 mA
— Erase: 10 mA
— Standby: 10 μA (CMOS)
Block erase suspend/resume
— Suspends an erase operation to read data from, or
program data to, a block that is not being erased, then
resumes the erase operation
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting program or
erase cycle completion
WP# input pin
— At V
IL
, the device is protected. Program or erase
operations in the device are inhibited
— At V
IH
, the device is unprotected. Program and erase
operations are allowed
Minimum 10,000 program/erase cycles guaranteed
per block, without ECC (> 1 million cycles with ECC)
10-year data retention at 85
°
C
Industrial temperature range, –40
°
C to +85
°
C
100% good blocks over product lifetime
The Am30LV0064D is not offered for new designs. Please contact your Spansion representative for alternatives.
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