參數(shù)資料
型號(hào)： AM29F040B
廠商： Analog Devices, Inc.
英文描述： 4 Megabit (512K x 8-Bit) CMOS 5.0 Volt-only, Uniform Sector Flash Memory(4M位均勻扇區(qū)閃速存儲(chǔ)器)
中文描述： 4兆位（為512k × 8位）的CMOS 5.0伏只，統(tǒng)一部門(mén)快閃記憶體（4分位均勻扇區(qū)閃速存儲(chǔ)器）
文件頁(yè)數(shù)： 8/30頁(yè)
文件大?。?/td> 416K
代理商： AM29F040B
8
Am29F040B
Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hard-
ware sector unprotection feature re-enables both
program and erase operations in previously protected
sectors.
Sector protection/unprotection must be implemented
using programming equipment. The procedure re-
quires a high voltage (V
ID
) on address pin A9 and the
control pins. Details on this method are provided in a
supplement, publication number 19957. Contact an
AMD representative to obtain a copy of the appropriate
document.
The device is shipped with all sectors unprotected.
AMD offers the option of programming and protecting
sectors at its factory prior to shipping the device
through AMD’s ExpressFlash Service. Contact an
AMD representative for details.
It is possible to determine whether a sector is protected
or unprotected. See “Autoselect Mode” for details.
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to the Command Defi-
nitions table). In addition, the following hardware data
protection measures prevent accidental erasure or pro-
gramming, which might otherwise be caused by
spurious system level signals during V
CC
power-up
and power-down transitions, or from system noise.
Low V
CC
Write Inhibit
When V
CC
is less than V
LKO
, the device does not ac-
cept any write cycles. This protects data during V
CC
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets. Subsequent writes are ignored until V
CC
is greater than V
LKO
. The system must provide the
proper signals to the control pins to prevent uninten-
tional writes when V
CC
is greater than V
LKO
.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
IL
, CE# = V
IH
or WE# = V
IH
. To initiate a write cycle,
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
IL
and OE# = V
IH
during power up, the
device does not accept commands on the rising edge
of WE#. The internal state machine is automatically
reset to reading array data on power-up.
COMMAND DEFINITIONS
Writing specific address and data commands or se-
quences into the command register initiates device
operations. The Command Definitions table defines the
valid register command sequences. Writing
incorrect
address and data values
or writing them in the
im-
proper sequence
resets the device to reading array
data.
All addresses are latched on the falling edge of WE# or
CE#, whichever happens later. All data is latched on
the rising edge of WE# or CE#, whichever happens
first. Refer to the appropriate timing diagrams in the
“AC Characteristics” section.
Reading Array Data
The device is automatically set to reading array data
after device power-up. No commands are required to
retrieve data. The device is also ready to read array
data after completing an Embedded Program or Em-
bedded Erase algorithm.
After the device accepts an Erase Suspend command,
the device enters the Erase Suspend mode. The sys-
tem can read array data using the standard read
timings, except that if it reads at an address within
erase-suspended sectors, the device outputs status
data. After completing a programming operation in the
Erase Suspend mode, the system may once again
read array data with the same exception. See “Erase
Suspend/Erase Resume Commands” for more infor-
mation on this mode.
The system
must
issue the reset command to re-en-
able the device for reading array data if DQ5 goes high,
or while in the autoselect mode. See the “Reset Com-
mand” section, next.
See also “Requirements for Reading Array Data” in the
“Device Bus Operations” section for more information.
The Read Operations table provides the read parame-
ters, and Read Operation Timings diagram shows the
timing diagram.
Reset Command
Writing the reset command to the device resets the de-
vice to reading array data. Address bits are don’t care
for this command.
The reset command may be written between the se-
quence cycles in an erase command sequence before
erasing begins. This resets the device to reading array
相關(guān)PDF資料
PDF描述
AM29LV2562M 512 Megabit (16 M x 32-Bit/32 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control
AM29LV2562MH120RPII 512 Megabit (16 M x 32-Bit/32 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control
AM29LV2562ML120RPII 512 Megabit (16 M x 32-Bit/32 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control
AM29PDL128G High Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker 14-CDIP -55 to 125
Am29PDL128G70 128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIO Control
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM29F040B120EC 制造商:AMD 功能描述:*
AM29F040B-120EC 制造商:Advanced Micro Devices 功能描述:NOR Flash, 512K x 8, 32 Pin, Plastic, TSSOP 制造商:SILICON 功能描述:NOR Flash, 512K x 8, 32 Pin, Plastic, TSSOP
AM29F040B-120ED 制造商:Spansion 功能描述:NOR Flash Parallel 5V 4Mbit 512K x 8bit 120ns 32-Pin TSOP 制造商:Spansion 功能描述:Flash Memory IC 制造商:Advanced Micro Devices 功能描述:NOR Flash, 512K x 8, 32 Pin, Plastic, TSSOP
AM29F040B-120EE 制造商:Spansion 功能描述:NOR Flash Parallel 5V 4Mbit 512K x 8bit 120ns 32-Pin TSOP
AM29F040B120JC 制造商:AMD 功能描述:* 制造商:Advanced Micro Devices 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*