參數(shù)資料
型號: AM29F040B
廠商: Analog Devices, Inc.
英文描述: 4 Megabit (512K x 8-Bit) CMOS 5.0 Volt-only, Uniform Sector Flash Memory(4M位均勻扇區(qū)閃速存儲器)
中文描述: 4兆位(為512k × 8位)的CMOS 5.0伏只,統(tǒng)一部門快閃記憶體(4分位均勻扇區(qū)閃速存儲器)
文件頁數(shù): 25/30頁
文件大小: 416K
代理商: AM29F040B
Am29F040B
25
AC CHARACTERISTICS
ERASE AND PROGRAMMING PERFORMANCE
Notes:
1. Typical program and erase times assume the following conditions: 25
°
C, 5.0 V V
CC
, 1,000,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
2.
Under worst case conditions of 90°C, V
CC
= 4.5 V (4.75 V for -55), 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded, only then
does the device set DQ5 = 1. See the section on DQ5 for further information.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See Table 4
for further information on command definitions.
6. The device has a guaranteed minimum erase and program cycle endurance of 1,000,000 cycles.
Parameter
Typ (Note 1)
Max (Note 2)
Unit
Comments
Sector Erase Time
1
8
sec
Excludes 00h programming prior to
erasure (Note 4)
Chip Erase Time
8
64
sec
Byte Programming Time
7
300
μs
Excludes system-level overhead
(Note 5)
Chip Programming Time (Note 3)
3.6
10.8
sec
t
GHEL
t
WS
OE#
CE#
WE#
t
DS
Data
t
AH
Addresses
t
DH
t
CP
DQ7#
D
OUT
t
WC
t
AS
t
CPH
PA
Data# Polling
A0 for program
55 for erase
t
RH
t
WHWH1 or 2
t
WH
PD for program
30 for sector erase
10 for chip erase
555 for program
2AA for erase
PA for program
SA for sector erase
555 for chip erase
t
BUSY
Notes:
1. PA = Program Address, PD = Program Data, SA = Sector Address, DQ7# = Complement of Data Input, D
OUT
= Array Data.
2. Figure indicates the last two bus cycles of the command sequence.
21445C-19
Figure 14.
Alternate CE# Controlled Write Operation Timings
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