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參數(shù)資料
| 型號(hào)： | AFE1230 |
| 英文描述： | G.SHDSL ANALOG FRONT-END |
| 中文描述： | 灣SHDSL的模擬前端 |
| 文件頁數(shù)： | 5/15頁 |
| 文件大?。?/td> | 313K |
| 代理商： | AFE1230 |
AFE1230
SBWS015A
5
Receive Filter
The receive filter consists of three independent sections used
for both the removal of quantization noise as well as the
reduction of data rate (otherwise known as downsampling).
The first section is comprised of a sinc
5
filter with a
downsampling ratio of 12x. The resulting digital signal is then
passed to a droop compensation filter before being sent
through the final IIR filter section, while being downsampled
by two. Two filter cutoff configurations are available, as seen
in Table II. The corresponding cutoff frequencies relate to the
full-rate low-pass filter spectral template of the filter, as seen
from the inputs of Table II.
Transmit Power
The on-chip differential line driver is designed to drive G.SHDSL
power levels directly, or it can be used as a low-power buffer for
driving a higher power external driver (for example the OPA2677)
for applications such as HDSL2. The AFE1230 driver will
generate an output swing of 6.2V peak-to-peak differential.
When used with a suitable transformer (see Figures 8 and 10),
the AFE1230 can generate up to 14.5dBm of power into a 135
line load. When used as a buffer with an OPA2677 driver,
17dBm of power can be generated. Relative transmit power can
be controlled digitally through control bits sent to the transmit
section by the serial interface. Relative transmit power reduction
can be set to 0, –6, –12, or –18dB, depending on the control bits
presented to the AFE1230, as shown in Table III.
FIGURE 2. Overall Transmit Filter. D/A Converter Frequency Response, Fifth-Order with 0.25x, 0.38x, and 0.5x.
FIGURE 3. Overall Transmit Filter. D/A Converter Frequency Response, Seventh-Order with 0.25x, 0.38x, and 0.5x.
TABLE III. Transmit Power Backoff.
TABLE II. rx Filter Cutoff Frequency Setting.
rx CUTOFF (txData Bit 24)
RATIO (Corner Frequency)
0
1
0.25 MCLK/24
0.5 MCLK/24
TRANSMIT POWER
BACK OFF CODE
(txData Bits 25, 26)
TRANSMIT
POWER
REDUCTION
TRANSMIT POWER
G.SHDSL
HDSL2
00
01
10
11
0dB
–
6dB
–
12dB
–
18dB
14.5dBm
8.5dBm
2.5dBm
–
4.5dBm
17.0dBm
11.0dBm
5.0dBm
–
1.0dBm
0
–
50
–
100
–
150
–
200
–
250
–
300
10
–
3
10
–
2
10
–
1
10
0
0
–
50
–
100
–
150
–
200
–
250
–
300
–
350
10
–
3
10
–
2
10
–
1
10
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AFE1230E | G.SHDSL ANALOG FRONT-END |
| AFE1231K | G.SHDSL ANALOG FRONT-END |
| AFE1231KG4 | G.SHDSL ANALOG FRONT-END |
| AFE2124 | Dual HDSL/SDSL ANALOG FRONT END |
| AFE2124E | Dual HDSL/SDSL ANALOG FRONT END |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AFE1230E | 功能描述:電信線路管理 IC G.SHDSL Analog Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1230E/1K | 功能描述:電信線路管理 IC G.SHDSL Analog Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1230E/1KG4 | 功能描述:電信線路管理 IC G.SHDSL Analog Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1230E-1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AFE1230E-1/1K | 制造商:Texas Instruments 功能描述: |
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