參數(shù)資料
型號(hào)： ADV7393BCPZ-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 22/108頁(yè)
文件大?。?/td> 0K
描述： IC DAC ENCODER VID HDTV 40-LFCSP
產(chǎn)品變化通告： ADV734x, ADV739x Feature Improvement
設(shè)計(jì)資源： Reconstruction Video Filter Using ADA4430-1 Amplifier After ADV7393 Video Encoder (CN0101)
標(biāo)準(zhǔn)包裝： 2,500
類型： 視頻編碼器
應(yīng)用： 機(jī)頂盒，視頻播放器，顯示器
電壓 - 電源，模擬： 2.6 V ~ 3.46 V
電壓 - 電源，數(shù)字： 1.71 V ~ 1.89 V
安裝類型： 表面貼裝
封裝/外殼： 40-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 40-LFCSP-VQ（6x6）
包裝： 帶卷 (TR)
配用： ADV7393-DBRDZ-ND - BOARD EVAL FOR ADV7393
EVAL-ADV7393EBZ-ND - BOARD EVAL FOR ADV7393 ENCODER
ADV7390/ADV7391/ADV7392/ADV7393
Data Sheet
Rev. G | Page 20 of 108
Pin No.
Mnemonic
Input/
Output
Description
ADV7390/
ADV7391
ADV7392/
ADV7393
ADV7390
WLCSP
24
30
A1
RSET
I
Controls the amplitudes of the DAC 1, DAC 2, and DAC 3
outputs. For full-drive operation (for example, into a 37.5 Ω
load), a 510 Ω resistor must be connected from RSET to
AGND. For low-drive operation (for example, into a 300 Ω
load), a 4.12 kΩ resistor must be connected from RSET to
AGND.
23
29
C2
COMP
O
Compensation Pin. Connect a 2.2 nF capacitor from COMP
to VAA.
B1
DAC 1
O
DAC Output. Full-drive and low-drive capable DAC
22, 21, 20
28, 27, 26
DAC 1, DAC 2,
DAC 3
O
DAC Outputs. Full-drive and low-drive capable DACs.
12
14
F3
SCL
I
I2C Clock Input.
11
13
F2
SDA
I/O
I2C Data Input/Output.
10
12
E3
ALSB
I
ALSB sets up the LSB2 of the MPU I2C address.
14
20
D3
RESET
I
Resets the on-chip timing generator and sets the ADV739x
into its default mode.
19
25
C1
VAA
P
Analog Power Supply (2.7 V or 3.3 V).
5, 28
6, 35
A3, D4
VDD
P
Digital Power Supply (1.8 V). For dual-supply
configurations, VDD can be connected to other 1.8 V
supplies through a ferrite bead or suitable filtering.
1
A5
VDD_IO
P
Input/Output Digital Power Supply (1.8 V or 3.3 V).
17
23
E1
PVDD
P
PLL Power Supply (1.8 V). For dual-supply configurations,
PVDD can be connected to other 1.8 V supplies through a
ferrite bead or suitable filtering.
16
22
E2
EXT_LF
I
External Loop Filter for the Internal PLL.
15
21
F1
PGND
G
PLL Ground Pin.
18
24
D1
AGND
G
Analog Ground Pin.
6, 29
7, 36
C3, D5
DGND
G
Digital Ground Pin.
32
40
D2
GND_IO
G
Input/Output Supply Ground Pin.
External Pad
EPAD
G
Connect to analog ground (AGND).
1
ED = enhanced definition = 525p and 625p.
2
LSB = least significant bit. In the ADV7390/ADV7392, setting the LSB to 0 sets the I2C address to 0xD4. Setting it to 1 sets the I2C address to 0xD6. In the
ADV7391/ADV7393, setting the LSB to 0 sets the I2C address to 0x54. Setting it to 1 sets the I2C address to 0x56.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7393-DBRDZ 功能描述:BOARD EVAL FOR ADV7393 RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:Advantiv® 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081
ADV7393EBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7393WBCPZ 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Trays
ADV7393WBCPZ-REEL 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Tape and Reel
ADV73946603 制造商:LG Corporation 功能描述:Frame Assembly
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