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參數(shù)資料
| 型號： | ADV7314KST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Multiformat 216 MHz Video Encoder with Six NSV 14-Bit DACs |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP64 |
| 封裝： | LEAD FREE, MS-026BCD, LQFP-64 |
| 文件頁數(shù)： | 22/84頁 |
| 文件大?。?/td> | 1069K |
| 代理商： | ADV7314KST |
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REV. 0
–22–
ADV7314
NOTES
1
When set to 0, the line and field counters automatically wrap around at the end of the field/frame of the standard selected. When set to 1, the field/line
counters are free running and wrap around when external sync signals indicate so.
2
Adaptive Filter mode is not available in PS only @ 54 MHz input mode.
SR7-
SR0
12h
Register
HD Mode
Register 3
Bit Description
HD Y Delay with
Respect to Falling Edge
of
HSYNC
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
0
0
0
0
1
Bit 1
0
0
1
1
0
Bit 0
0
1
0
1
0
Register Setting
0 clk cycle
1 clk cycle
2 clk cycle
3 clk cycle
4 clk cycle
0 clk cycle
1 clk cycle
2 clk cycle
3 clk cycle
4 clk cycle
Disabled
Enabled
Disabled
Enabled
Cb after falling edge of
HSYNC
Cr after falling edge of
HSYNC
0 must be written to this bit
8-bit input
10-bit input
Disabled
Enabled
0 must be written to this bit
Disabled
Enabled
4:4:4
4:2:2
Disabled
Enabled
A low-high-low transition resets the
internal HD timing counters
30 Hz/2200 total samples/line
25 Hz/2640 total samples/line
0 should be written to these bits
Field Input
VSYNC
Input
Update Field/line counter
Field/line counter free running
0 must be written to this bit
Disabled
Enabled
Disabled
Enabled
DAC E = Pb; DAC F = Pr
Reset Value
00h
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
HD CGMS
0
1
HD CGMS CRC
0
1
13h
HD Cr/Cb Sequence
0
1
4Ch
Reserved
HD Input Format
0
0
1
0
1
Reserved
HD Chroma SSAF
0
0
1
HD Chroma Input
0
1
0
1
14h
HD Mode
Register 5
HD Timing Reset
x
00h
1080i Frame Rate
0
0
0
1
Reserved
0
0
0
0
1
Lines/Frame
1
0
1
15h
Reserved
HD RGB Input
0
00h
0
1
HD Sync on PrPb
0
1
HD Color DAC Swap
0
1
DAC E = Pr; DAC F = Pb
Gamma Curve A
HD Gamma Curve A/B
0
1
Gamma Curve B
Disabled
HD Gamma Curve
Enable
0
1
Enabled
Mode A
HD Adaptive Filter
Mode
2
0
1
Mode B
Disabled
HD Adaptive Filter
Enable
2
0
1
Enabled
HD Double Buffering
HD Mode
Register 4
HD Mode
Register 6
HD
VSYNC
/Field
Input
Sinc Filter on DAC D,
E, F
HD with Respect to
Falling Edge of
HSYNC
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