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參數(shù)資料
| 型號： | ADUM1310BRWZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 其它接口 |
| 英文描述： | Triple-Channel Digital Isolator with Programmable Default Output |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, PDSO16 |
| 封裝： | ROHS COMPLIANT, MS-013AA, SOIC-16 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大小： | 229K |
| 代理商： | ADUM1310BRWZ |
ADuM1310
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Rev. E | Page 9 of 16
Table 8.
Parameter
Storage Temperature
Ambient Operating
Temperature
Supply Voltages
1
Input Voltage
1, 2
Output Voltage
1, 2
Average Output Current per
Pin
3
Side 1
Side 2
Common-Mode Transients
4
Rating
–65°C to +150°C
–40°C to +105°C
–0.5 V to +6.5 V
–0.5 V to V
DDI
+ 0.5 V
–0.5 V
DDO
+ 0.5 V to V
DDO
+ 0.5 V
–18 mA to +18 mA
–22 mA to +22 mA
–100 kV/μs to +100 kV/μs
1
All voltages are relative to their respective ground.
2
V
DDI
and V
DDO
refer to the supply voltages on the input and output sides of a
given channel, respectively.
3
See Figure 2 for maximum rated current values for various temperatures.
4
Refers to common-mode transients across the insulation barrier. Common-
mode transients exceeding the Absolute Maximum Ratings can cause latch-
up or permanent damage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions may affect device reliability.
REGULATORY INFORMATION
In accordance with UL1577, each ADuM1310 is proof tested by
applying an insulation test voltage ≥3000 V rms for 1 second
(current leakage detection limit = 5 μA).
In accordance with DIN EN 60747-5-2, each ADuM1310 is
proof tested by applying an insulation test voltage ≥1050 V peak
for 1 second (partial discharge detection limit = 5 pC).
The ADuM1310 is approved by the following organizations:
UL:
Recognized under 1577 Component Recognition Program.
CSA:
Approved under CSA Component Acceptance Notice #5A.
VDE:
Certified according to
DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01, and
DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000.
ESD CAUTION
Table 9. Truth Table (Positive Logic)
V
IX
Input
1
Input
State
H
X
L or NC Powered
L
X
L or NC Powered
X
H or NC H
X
L
H
X
H or NC X
CTRL
V
DISABLE
V
DD1
State
1
V
DD2
State
1
Powered
Powered
Powered
Powered
V
OX
Output
1
Notes
H
L
H
L
H
Normal operation, data is high.
Normal operation, data is low.
Inputs disabled. Outputs are in the default state as determined by CTRL.
Inputs disabled. Outputs are in the default state as determined by CTRL.
Input unpowered. Outputs are in the default state as determined by CTRL.
Outputs return to input state within 1 μs of V
DD1
power restoration.
See the Power-Up/Power-Down Considerations section for more details.
Input unpowered. Outputs are in the default state as determined by CTRL.
Outputs return to input state within 1 μs of V
DD1
power restoration.
See the Power-Up/Power-Down Considerations section for more details.
Output unpowered. Output pins are in high impedance state.
Outputs return to input state within 1 μs of V
DD2
power restoration.
See the Power-Up/Power-Down Considerations section for more details.
X
X
Unpowered Powered
X
L
X
Unpowered Powered
L
X
X
X
Powered
Unpowered Z
1
V
IX
and V
OX
refer to the input and output signals of a given channel (A, B, C, or D).
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