參數(shù)資料
型號(hào)： ADUC832BS
廠商： ANALOG DEVICES INC
元件分類： 微控制器/微處理器
英文描述： MicroConverter, 12-Bit ADCs and DACs with Embedded 62 kBytes Flash MCU
中文描述： 8-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP52
封裝： PLASTIC, MQFP-52
文件頁(yè)數(shù)： 21/80頁(yè)
文件大?。?/td> 1311K
代理商： ADUC832BS
REV. 0
ADuC832
–21–
ADCCON3 – (ADC Control SFR #3)
The ADCCON3 register controls the operation of various calibra-
tion modes as well as giving an indication of ADC busy status.
SFR Address:
SFR Power-On Default Value:
Bit Addressable:
F5H
00H
NO
Table V. ADCCON3 SFR Bit Designations
Bit
Name
Description
ADCCON3.7 BUSY
The ADC Busy Status Bit (BUSY) is a read-only status bit that is set during a valid ADC conversion or
calibration cycle. Busy is automatically cleared by the core at the end of conversion or calibration.
Gain Calibration Disable Bit.
Set to
“
0
”
to Enable Gain Calibration.
Set to
“
1
”
to Disable Gain Calibration.
Number of Averages Selection Bits.
This bit selects the number of ADC readings averaged during a calibration cycle.
AVGS1 AVGS0
Number of Averages
0
0
15
0
1
1
1
0
31
1
1
63
Reserved. This bit should always be written as
“
0.
”
This bit should always be written as
“
1
”
by the user when performing calibration.
Calibration Type Select Bit.
This bit selects between Offset (zero-scale) and Gain (full-scale) calibration.
Set to
“
0
”
for Offset Calibration.
Set to
“
1
”
for Gain Calibration.
Start Calibration Cycle Bit.
When set, this bit starts the selected calibration cycle. It is automatically cleared when the calibration
cycle is completed.
ADCCON3.6 GNCLD
ADCCON3.5 AVGS1
ADCCON3.4 AVGS0
ADCCON3.3 RSVD
ADCCON3.2 RSVD
ADCCON3.1 TYPICAL
ADCCON3.0 SCAL
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