參數(shù)資料
型號: ADUC7036CCPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 49/132頁
文件大?。?/td> 0K
描述: IC MCU 96K FLASH DUAL 48LFCSP
標(biāo)準(zhǔn)包裝: 2,500
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 20.48MHz
連通性: LIN,SPI,UART/USART
外圍設(shè)備: PSM,溫度傳感器,WDT
輸入/輸出數(shù): 9
程序存儲器容量: 96KB(48K x 16)
程序存儲器類型: 閃存
RAM 容量: 1.5K x 32
電壓 - 電源 (Vcc/Vdd): 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 115°C
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
包裝: 帶卷 (TR)
ADuC7036
Rev. C | Page 23 of 132
Remap Operation
When a reset occurs on the ADuC7036, execution starts
automatically in the factory-programmed internal configuration
code. This so-called kernel is hidden and cannot be accessed by
user code. If the ADuC7036 is in normal mode, it executes the
power-on configuration routine of the kernel and then jumps to
the reset vector, Address 0x00000000, to execute the reset
exception routine of the user. Because the Flash/EE is mirrored at
the bottom of the memory array at reset, the reset routine must
always be written in Flash/EE.
The remap command must be executed from the absolute
Flash/EE address and not from the mirrored, remapped
segment of memory, which may be replaced by SRAM. If a
remap operation is executed while operating code from the
mirrored location, prefetch/data aborts may occur or the user
may observe abnormal program operation.
Any kind of reset remaps the Flash/EE memory to the bottom
of the memory array.
SYSMAP0 Register
Name: SYSMAP0
Address: 0xFFFF0220
Default Value: Updated by the kernel
Access: Read/write access
Function: This 8-bit register allows user code to remap either
RAM or Flash/EE space into the bottom of the ARM memory
space, starting at Address 0x00000000.
Table 10. SYSMAP0 MMR Bit Designations
Bit
Description
7 to 1
Reserved. These bits are reserved and should be written
as 0 by user code.
0
Remap bit.
Set by the user to remap the SRAM to 0x00000000.
Cleared automatically after a reset to remap the
Flash/EE memory to 0x00000000.
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