參數(shù)資料
型號(hào)： ADSP-TS203S
廠商： Analog Devices, Inc.
英文描述： TigerSHARC Embedded Processor
中文描述： TigerSHARC系列嵌入式處理器
文件頁(yè)數(shù)： 10/40頁(yè)
文件大?。?/td> 609K
代理商： ADSP-TS203S
Rev. PrB
|
Page 10 of 40
|
December 2003
ADSP-TS203S
Preliminary Technical Data
POWER DOMAINS
The ADSP-TS203S processor has separate power supply con-
nections for internal logic (V
DD
), analog circuits (V
DD_A
), I/O
buffer (V
DD_IO
), and internal DRAM (V
DD_DRAM
) power supply.
Note that the analog (V
DD_A
) supply powers the clock generator
PLLs. To produce a stable clock, systems must provide a clean
power supply to power input V
DD_A
. Designs must pay critical
attention to bypassing the V
DD_A
supply.
FILTERING REFERENCE VOLTAGE AND CLOCKS
Figure 6
and
Figure 7
show possible circuits for filtering V
REF
,
and SCLK_V
REF
. These circuits provide the reference voltages
for the switching voltage reference and system clock reference.
DEVELOPMENT TOOLS
The ADSP-TS203S processor is supported with a complete set
of CROSSCORE
software and hardware development tools,
including Analog Devices emulators and VisualDSP++
devel-
opment environment. The same emulator hardware that
supports other TigerSHARC processors also fully emulates the
ADSP-TS203S processor.
The VisualDSP++ project management environment lets pro-
grammers develop and debug an application. This environment
includes an easy to use assembler (which is based on an alge-
braic syntax), an archiver (librarian/library builder), a linker, a
loader, a cycle-accurate instruction-level simulator, a C/C++
compiler, and a C/C++ runtime library that includes DSP and
mathematical functions. A key point for theses tools is C/C++
code efficiency. The compiler has been developed for efficient
translation of C/C++ code to DSP assembly. The DSP has archi-
tectural features that improve the efficiency of compiled C/C++
code.
The VisualDSP++ debugger has a number of important fea-
tures. Data visualization is enhanced by a plotting package that
offers a significant level of flexibility. This graphical representa-
tion of user data enables the programmer to quickly determine
the performance of an algorithm. As algorithms grow in com-
plexity, this capability can have increasing significance on the
designer’s development schedule, increasing productivity. Sta-
tistical profiling enables the programmer to nonintrusively poll
the processor as it is running the program. This feature, unique
to VisualDSP++, enables the software developer to passively
gather important code execution metrics without interrupting
the realtime characteristics of the program. Essentially, the
developer can identify bottlenecks in software quickly and effi-
ciently. By using the profiler, the programmer can focus on
those areas in the program that impact performance and take
corrective action.
Debugging both C/C++ and assembly programs with the
VisualDSP++ debugger, programmers can:
View mixed C/C++ and assembly code (interleaved source
and object information)
Insert breakpoints
Set conditional breakpoints on registers, memory,
and stacks
Trace instruction execution
Perform linear or statistical profiling of program execution
Fill, dump, and graphically plot the contents of memory
Perform source level debugging
Create custom debugger windows
The VisualDSP++ IDE lets programmers define and manage
DSP software development. Its dialog boxes and property pages
let programmers configure and manage all of the TigerSHARC
processor development tools, including the color syntax high-
lighting in the VisualDSP++ editor. This capability permit
programmers to:
Control how the development tools process inputs and
generate outputs
Maintain a one-to-one correspondence with the tool’s
command line switches
The VisualDSP++ Kernel (VDK) incorporates scheduling and
resource management tailored specifically to address the mem-
ory and timing constraints of DSP programming. These
capabilities enable engineers to develop code more effectively,
Figure 6. V
REF
Filtering Scheme
Figure 7. SCLK_V
REF
Filtering Scheme
CROSSCORE is a registered trademark of Analog Devices, Inc.
VisualDSP++ is a registered trademark of Analog Devices, Inc.
V
DD_IO
V
SS
V
REF
R1
R2
C1
C2
R1: 2 k
R2: 2.87 k
C1: 1
C2: 1 nF CAPACITOR (HF SMD) PLACED CLOSE TO DSP’S PINS
SERIES RESISTOR (±1%)
SERIES RESISTOR (±1%)
F CAPACITOR (SMD)
CLOCK DRIVER
VOLTAGE*OR
V
DD_IO
V
SS
SCLK_V
REF
R1
R2
C1
C2
R1: 2 k
R2: 2.87 k
C1: 1
C2: 1 nF CAPACITOR (HF SMD) PLACED CLOSE TO DSP’S PINS
*IF CLOCK DRIVER VOLTAGE
SERIES RESISTOR (±1%)
SERIES RESISTOR (±1%)
F CAPACITOR (SMD)
V
DD_IO
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參數(shù)描述
ADSP-TS203SABP-050 功能描述:IC DSP FLOAT/FIXED 500MHZ 576BGA RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:TigerSHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類(lèi)型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類(lèi)型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤(pán)
ADSP-TS203SABP-05X 制造商:Analog Devices 功能描述:
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ADSP-TS203SBBPZ050 制造商:Analog Devices 功能描述:DSP - Bulk
ADSQ-1410 制造商:MURATA-PS 制造商全稱:Murata Power Solutions Inc. 功能描述:Quad 14-Bit, 10 MSPS Sampling A/D Converter
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