參數(shù)資料
型號(hào): ADSP-21MSP59
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號(hào)處理
英文描述: DSP Microcomputer(DSP 微計(jì)算機(jī))
中文描述: 24-BIT, 13 MHz, OTHER DSP, PQFP100
封裝: METRIC, PLASTIC, TQFP-100
文件頁(yè)數(shù): 26/40頁(yè)
文件大?。?/td> 392K
代理商: ADSP-21MSP59
REV. 0
–26–
ADSP-21msp58/59
Parameter
Min
Max
Unit
Interrupts and Flags
T iming Requirement:
t
IFS
t
IFH
IRQx
or FI Setup before CLK OUT Low
1, 2, 3
IRQx
or FI Hold after CLK OUT High
1, 2, 3
0.25t
CK
+ 15
0.25t
CK
ns
ns
Switching Characteristics:
t
FOH
t
FOD
Flag Output Hold after CLK OUT Low
4
Flag Output Delay from CLK OUT Low
4
0.5t
CK
– 7
ns
ns
0.5t
CK
+ 5
NOT ES
1
If
IRQx
and FI inputs meet t
IFS
and t
IFH
setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on
the following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the User’s Manual for further information on interrupt servicing.)
2
Edge-sensitive interrupts require pulse widths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
3
IRQx
=
IRQ0
,
IRQ1
, and
IRQ2
.
4
Flag Output = FL0 and FO.
FLAG
OUTPUTS
t
FOD
t
IFS
t
IFH
CLKOUT
t
FOH
IRQ
FIx
Figure 16. Interrupts and Flags
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