參數(shù)資料
型號： ADSP-21MSP59
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號處理
英文描述： DSP Microcomputer(DSP 微計(jì)算機(jī))
中文描述： 24-BIT, 13 MHz, OTHER DSP, PQFP100
封裝： METRIC, PLASTIC, TQFP-100
文件頁數(shù)： 21/40頁
文件大?。?/td> 392K
代理商： ADSP-21MSP59
ADSP-21msp58/59–SPECIFICATIONS
RECOMMENDEDOPERATINGCONDITIONS
B Grade
Min
Parameter
Max
Unit
V
DD
T
AMB
Supply Voltage
Ambient Operating T emperature
4.50
–40
5.50
+85
V
°
C
See “Environmental Conditions” for information on thermal specifications.
ELECTRICAL CHARACTERISTICS
Parameter
T est Conditions
Min
Max
Unit
V
IH
V
IH
V
IL
V
OH
Hi-Level Input Voltage
1, 2
Hi-Level CLK IN Voltage
Lo-Level Input Voltage
1, 3
Hi-Level Output Voltage
1, 4, 5
@ V
DD
= max
@ V
DD
= max
@ V
DD
= min
@ V
DD
= min,
I
OH
= –0.5 mA
@ V
DD
= min,
I
OH
= –100
μ
A
6
@ V
DD
= min,
I
OL
= 2 mA
@ V
DD
= max,
V
IN
= V
DD
max
@ V
DD
= max,
V
IN
= 0 V
@ V
DD
= max,
V
IN
= V
DD
max
8
@ V
DD
= max,
V
IN
= 0 V
8
@ V
DD
= max,
Codec Inactive
@ V
DD
= max,
V
CC
= max
@ V
DD
= max, See
ADSP-2100 Family User’s
Manual, Chapter 9
Codec Active
@ V
IN
= 2.5 V,
f
IN
= 1.0 MHz,
T
AMB
= 25
°
C
@ V
IN
= 2.5 V,
f
IN
= 1.0 MHz,
T
AMB
= 25
°
C
2.0
2.2
V
V
V
0.8
2.4
V
V
DD
– 0.3
V
V
OL
Lo-Level Output Voltage
1, 4, 5
0.4
V
I
IH
Hi-Level Input Current
3
10
μ
A
I
IL
Lo-Level Input Current
3
10
μ
A
I
OZH
T ristate Leakage Current
7
10
μ
A
I
OZL
T ristate Leakage Current
7
10
μ
A
I
DD
Digital Supply Current (Idle)
6, 9
18
mA
I
DD
Digital Supply Current (Dynamic)
9, 10
92
mA
I
DD
Digital Supply Current (Powerdown)
9
100
18
μ
A
mA
I
CC
C
I
Analog Supply Current (Dynamic)
9
Input Pin Capacitance
3, 11, 12
8
pF
C
O
Output Pin Capacitance
7, 11, 12
8
pF
NOT ES
1
Bidirectional pins: D0-D23, RFS0, RFS1, SCLK 0, SCLK 1, T FS0, T FS1, HD0-HD7/HAD0-HAD7.
2
Input only pins:
RESET
,
IRQ2
,
BR
, MMAP, DR0, DR1,
HSEL
, HSIZE, BMODE, HMD0, HMD1,
HRD
/HWR,
HWR
/
HDS
,
PWD
, HA2/ALE, HA1-0.
3
Input only pins: CLK IN,
RESET
,
IRQ2
,
BR
, MMAP, DR0, DR1,
HSEL
, HSIZE, BMODE, HMD0, HMD1,
HRD
/HWR,
HWR
/
HDS
,
PWD
, HA2/ALE, HA1-0.
4
Output pins:
BG
,
PMS
,
DMS
,
BMS
,
RD
,
WR
, A0-A13, DT 0, DT 1, CLK OUT ,
HACK
, FL0.
5
Although specified for T T L outputs, all ADSP-21msp58/59 outputs are CMOS-compatible and will drive to V
and GND, assuming no dc loads.
6
Idle refers to ADSP-21msp58/59 state of operation during IDLE instruction. Deasserted pins are driven to either V
DD
or GND. Refer to chart in back for lower
IDLE currents.
7
T hree-statable pins: A0-A13, D0-D23,
PMS
,
DMS
,
BMS
,
RD
,
WR
, DT 0, DT 1, SCLK 0, SCLK 1, T FS0, T FS1, RFS0, RSF1, HD0-HD7/HAD0-HAD7.
8
0 V on
BR,
CLK IN Active (to force three-state condition).
9
Current reflects the digital portion of device operating with no output loads and a 2 k
load on the analog output (VOUT
, VOUT
).
10
t
= 76.92 ns, CODEC active, 80% execution type 1 instructions, with random data. For typical figures for digital and analog supply currents, refer to “Power
Dissipation” section.
11
Guaranteed but not tested.
12
Output pin capacitance is the capacitive load for any three-stated output pin.
Specifications subject to change without notice.
–21–
REV. 0
ADSP-21msp58/59
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