參數(shù)資料
型號(hào): ADSP-2141LKS-N1
廠商: ANALOG DEVICES INC
元件分類: 加密電路
英文描述: DSP
中文描述: TELECOM, DATA ENCRYPTION CIRCUIT, PQFP208
封裝: METRIC, PLASTIC, QFP-208
文件頁(yè)數(shù): 31/39頁(yè)
文件大?。?/td> 257K
代理商: ADSP-2141LKS-N1
REV. 0
ADSP-2141L
–31–
Parameter
Min
Max
Unit
IDMA Read, Long Read Cycle (IDMA Mode, Multiplex Bus)
Timing Requirements:
t
IKR
MPLX9 Low Before Start of Read
1
t
IRP
Duration of Read
1
Switching Characteristics:
t
IKHR
t
IKDS
t
IKDH
t
IKDD
t
IRDE
t
IRDV
t
IRDH1
MPLX_BUS Previous Data Hold After Start of Read (DM/PM1)
3
t
IRDH2
MPLX_BUS Previous Data Hold After Start of Read (PM2)
4
0
15
ns
ns
MPLX9 High After Start of Read
1
MPLX_BUS Data Setup Before MPLX9 Low
MPLX_BUS Data Hold After End of Read
2
MPLX_BUS Data Disabled After End of Read
2
MPLX_BUS Previous Data Enabled After Start of Read
MPLX_BUS Previous Data Valid After Start of Read
15
ns
ns
ns
ns
ns
ns
ns
ns
0.5t
CK
– 7
0
14
0
15
2t
CK
– 5
t
CK
– 5
NOTES
1
Start of Read = MPLX7 Low and MPLX5 Low.
2
End of Read = MPLX7 High or MPLX5 High.
3
DM read or first half of PM read.
4
Second half of PM read.
t
IKHR
MPLX9
/
IACK
MPLX7
/
IS
MPLX_BUS
/
IAD15–0
t
IKR
t
IRP
t
IKDH
t
IKDS
t
IRDE
PREVIOUS
DATA
READ DATA
t
IRDV
t
IKDD
t
IRDH
MPLX6
/
IRD
Figure 21. IDMA Read, Long Read Cycle (IDMA Mode, Multiplex Bus)
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