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參數(shù)資料
| 型號(hào)： | ADSP-2187L |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | DSP（Digital Signal Processing）Microcomputer(數(shù)字信號(hào)處理控制器) |
| 中文描述： | DSP（數(shù)字信號(hào)處理），微機(jī)（數(shù)字信號(hào)處理控制器） |
| 文件頁數(shù)： | 1/4頁 |
| 文件大小： | 79K |
| 代理商： | ADSP-2187L |
PRELIMINARY
I/O Memory Interface with 2048 Locations Supports
Parallel Peripherals (Mode Selectable)
Programmable Memory Strobe and Separate I/O Memory
Space Permits “ Glueless” System Design
Programmable Wait State Generation
Two Double-Buffered Serial Ports with Companding
Hardware and Automatic Data Buffering
Automatic Booting of On-Chip Program Memory from
Byte-Wide External Memory, e.g., EPROM, or
Through Internal DMA Port
Six External Interrupts
13 Programmable Flag Pins Provide Flexible System
Signaling
TECHNICAL
FUNCT IONAL BLOCK DIAGRAM
a
DSP Mcrocomputer
ADSP-2187L
FEATURES
PERFORMANCE
25 ns Instruction Cycle Time @ 3.3 Volts, 40 MIPS
Sustained Performance
Single-Cycle Instruction Execution
Single-Cycle Context Switch
3-Bus Architecture Allows Dual Operand Fetches in
Every Instruction Cycle
Multifunction Instructions
Power-Down Mode Featuring Low CMOS Standby
Power Dissipation with 400 Cycle Recovery from
Power-Down Condition
Low Power Dissipation in Idle Mode
INTEGRATION
ADSP-2100 Family Code Compatible, with Instruction
Set Extensions
160K Bytes of On-Chip RAM, Configured as 32K Words
On-Chip Program Memory RAM and 32K Words
On-Chip Data Memory RAM
Dual Purpose Program Memory for Both Instruction and
Data Storage
Independent ALU, Multiplier/Accumulator, and Barrel
Shifter Computational Units
Two Independent Data Address Generators
Powerful Program Sequencer Provides Zero Overhead
Looping Conditional Instruction Execution
Programmable 16-Bit Interval Timer with Prescaler
100-Lead TQFP
SYSTEM INTERFACE
16-Bit Internal DMA Port for High Speed Access to
On-Chip Memory (Mode Selectable)
4 MByte Memory Interface for Storage of Data Tables
and Program Overlays (Mode Selectable)
8-Bit DMA to Byte Memory for Transparent Program
and Data Memory Transfers (Mode Selectable)
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
*IC E -Port is a trademark of Analog Devices, Inc.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
Analog Devices, Inc., 1997
UART Emulation through Software SPORT Reconfiguration
ICE-Port Emulator Interface Supports Debugging in
GE NE RAL NOT E
T his data sheet represents preliminary (x- grade) specifications
for the ADSP-2187L 3.3V processor.
GENERAL DESCRIPTION
T he ADSP-2187L is a single-chip microcomputer optimized for
digital signal processing (DSP) and other high speed numeric
processing applications.
T he ADSP-2187L combines the ADSP-2100 family base archi-
tecture (three computational units, data address generators and
a program sequencer) with two serial ports, a 16-bit internal
DMA port, a byte DMA port, a programmable timer, Flag I/O,
extensive interrupt capabilities, and on-chip program and data
memory.
T he ADSP-2187L integrates 160K bytes of on-chip memory
configured as 32K words (24-bit) of program RAM, and 32K
words (16-bit) of data RAM. Power down circuitry is also pro-
vided to meet the low power needs of battery operated portable
equipment. T he ADSP-2187L is available in 100-lead T QFP
package.
In addition, the ADSP-2187L supports new instructions, which
include bit manipulations—bit set, bit clear, bit toggle, bit test—
new ALU constants, new multiplication instruction (x squared),
biased rounding, result free ALU operations, I/O memory trans-
fers, and global interrupt masking, for increased flexibility.
Fabricated in a high speed, low power, CMOS process, the
ADSP-2187L operates with a 25 ns instruction cycle time. Ev-
ery instruction can execute in a single processor cycle.
SERIAL PORTS
SPORT 1
SPORT 0
MEMORY
PROGRI/O
FAND
CBYTE DMA
16K
3
8K
3
24 PM
8K
3
24 OVERLAY 2
TIMER
ADSP-2100 BASE
ARCHITECTURE
SHIFTER
MAC
ALU
ARITHMETIC UNITS
POWER-DOWN
CONTROL
PROGRAM
DAG 2
DAG 1
GENERATORS
PROGRAM MEMORY ADDRESS
DATA MEMORY ADDRESS
PROGRAM MEMORY DATA
DATA MEMORY DATA
EXTERNAL
DATA
BUS
EXTERNAL
ADDRESS
BUS
INDMA
PORT
EXTERNAL
DATA
BUS
OR
FUL MODE
HOST MODE
16K
3
8K
3
24 PM
8K
3
16 OVERLAY 2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-2187LBST-160 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 40MHz 40MIPS 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:16BIT DSP 40 MHZ 64K WORDS RAM 100 LEAD - Bulk |
| ADSP-2187LBST-210 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 52.5MHz 52.5MIPS 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:16BIT DSP 40 MHZ 64K WORDS RAM 100 LEAD - Bulk 制造商:Analog Devices 功能描述:IC MICROCOMPUTER 16-BIT |
| ADSP-2187LBSTZ-160 | 制造商:Analog Devices 功能描述:DSP FIX PT 16BIT 40MHZ 40MIPS 100LQFP - Trays |
| ADSP-2187LBSTZ-1602 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2187LBSTZ-210 | 功能描述:IC DSP CONTROLLER 16BIT 100-TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:ADSP-21xx 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
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