參數(shù)資料
型號(hào): ADS7862
英文描述: CMOS 4-Bit-by-16-Word FIFO Register 16-CDIP -55 to 125
中文描述: 雙為500kHz,12位,2通道同步采樣模擬到數(shù)字轉(zhuǎn)換器
文件頁數(shù): 9/13頁
文件大小: 159K
代理商: ADS7862
9
ADS7862
FIGURE 3. Single-Ended Input: Common-Mode Voltage
Range vs V
REF
.
1.0
1.5
1.2
2.0
2.5
2.6
3.0
V
REF
(V)
C
–1
0
1
2
3
4
5
2.7
2.3
4.1
0.9
V
CC
= 5V
Single-Ended Input
Differential Input
1.0
1.5
1.2
2.0
2.5
2.6
3.0
V
REF
(V)
C
–1
0
1
2
3
4
5
4.7
0.3
V
CC
= 5V
4.05
0.90
FIGURE 2. Using the ADS7862 in the Single-Ended and Differential Input Modes.
FIGURE 4. Differential Input: Common-Mode Voltage
Range vs V
REF
.
In each case, care should be taken to ensure that the output
impedance of the sources driving the +IN and –IN inputs are
matched. Otherwise, this may result in offset error, which
will change with both temperature and input voltage.
The input current on the analog inputs depend on a number
of factors: sample rate, input voltage, and source impedance.
Essentially, the current into the ADS7862 charges the inter-
nal capacitor array during the sampling period. After this
capacitance has been fully charged, there is no further input
current. The source of the analog input voltage must be able
to charge the input capacitance (15pF) to a 12-bit settling
level within 2 clock cycles. When the converter goes into the
hold mode, the input impedance is greater than 1G
.
Care must be taken regarding the absolute analog input
voltage. The +IN input should always remain within the
range of GND – 300mV to V
DD
+ 0.3V.
CM
+V
REF
+V
REF
–V
REF
Single-Ended Inputs
t
+IN
CM
Voltage
CM
–V
REF
CM
+1/2V
REF
Differential Inputs
NOTES: Common-Mode Voltage (Differential Mode) = (IN+) + (IN–)
2
The maximum differential voltage between +IN and –IN of the ADS7862 is V
. See Figures 3 and 4 for a further
explanation of the common voltage range for single-ended and differential inputs.
t
+IN
–IN
CM
Voltage
CM
–1/2V
REF
–IN = CM Voltage
+V
REF
–V
REF
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