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參數(shù)資料
| 型號(hào)： | ADP3502 |
| 廠商： | Analog Devices, Inc. |
| 元件分類(lèi)： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | CDMA Power Management System |
| 中文描述： | CDMA的電源管理系統(tǒng) |
| 文件頁(yè)數(shù)： | 9/36頁(yè) |
| 文件大?。?/td> | 714K |
| 代理商： | ADP3502 |
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REV. 0
ADP3502
–9–
PIN CONFIGURATION
1
1
1
2
2
2
2
2
2
2
2
2
2
3
3
3
R
O
A
O
G
G
G
G
D
C
C
R
3
R
R
T
6
6
6
6
6
5
5
5
5
5
5
5
5
5
5
4
O
O
P
I
A
A
B
M
A
N
B
L
V
L
A
L
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
OPT3
KEYPADCOL0
KEYPADCOL1
KEYPADCOL2
KEYPADCOL3
KEYPADROW0
KEYPADROW1
KEYPADROW2
KEYPADROW3
KEYPADROW4
KEYPADROW5
TCXOON
SLEEP–
BLIGHT
DGND
INT–
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
VBAT
LDO7 (REF Rx1)
LDO6 (BASEBAND CORE)
VBAT
LDO5 (VIBRATOR)
LDO4 (AUDIO)
VBAT
LDO2 (BASEBAND AVDD)
REFO
AGND
LDO3 (RTC/COIN-CELL)
VBAT
LDO1 (BASEBAND VDD)
LDO11 (OPTION)
VBAT
RSTDELAY–
ADP3502
TOP VIEW
(Not to Scale)
PIN FUNCTION DESCRIPTION
Pin
No.
Mnemonic
I/O
Supply
Function
1
2
3
4
5
6
7
8
9
OPT3
KEYPADCOL0
KEYPADCOL1
KEYPADCOL2
KEYPADCOL3
KEYPADROW0
KEYPADROW1
KEYPADROW2
KEYPADROW3
KEYPADROW4
KEYPADROW5
TCXOON
I
O
O
O
O
I
I
I
I
I
I
I
VBAT
LDO1
LDO1
LDO1
LDO1
LDO1
LDO1
LDO1
LDO1
LDO1
LDO1
LDO1
Optional Power ON Input. ADP3502 will keep power ON when this pin goes high.
Keypad Column Strobe 0 (Open-Drain, Pull Low)
Keypad Column Strobe 1 (Open-Drain, Pull Low)
Keypad Column Strobe 2 (Open-Drain, Pull Low)
Keypad Column Strobe 3 (Open-Drain, Pull Low)
Keypad Row Input 0. Pulled up internally, 20 k
.
Keypad Row Input 1. Pulled up internally, 20 k
.
Keypad Row Input 2. Pulled up internally, 20 k
.
Keypad Row Input 3. Pulled up internally, 20 k
.
Keypad Row Input 4. Pulled up internally, 20 k
.
Keypad Row Input 5. Pulled up internally, 20 k
.
Logic Input Pin for Main LDOs (LDO1, LDO2, LDO3, LDO6) Turning On Control.
L: OFF, H: ON.
Logic Input Pin for LDO7 and LDO9. This input gates register data for these LDOs.
LDO7 and LDO9 are turned OFF when SLEEP goes low even if the registers are set
to ON. If register of SLEEP7 and SLEEP9 are set to “1,” the SLEEP signal is ignored.
LED Drive. Open-drain output.
Digital Ground
Interrupt Signal Output
10
11
12
13
SLEEP–
I
LDO1
14
15
16
BLIGHT
DGND
INT–
O
VBAT
O
LDO1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADP3502ASU | CDMA Power Management System |
| ADP3510 | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 |
| ADP3510ARU | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 |
| ADP3522 | GSM Power Management System |
| ADP3522ACP-1.8 | GSM Power Management System |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADP3502ASU | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:CDMA Power Management System |
| ADP3502ASU-REEL | 制造商:Analog Devices 功能描述:CDMA Power Management System 64-Pin TQFP T/R |
| ADP3510 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:CDMA Power Management System |
| ADP3510ARU | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:CDMA Power Management System |
| ADP3510ARU-REEL7 | 制造商:Analog Devices 功能描述: |
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