- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374022 > ADP3502 (Analog Devices, Inc.) CDMA Power Management System PDF資料下載
參數(shù)資料
| 型號： | ADP3502 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | CDMA Power Management System |
| 中文描述： | CDMA的電源管理系統(tǒng) |
| 文件頁數(shù)： | 22/36頁 |
| 文件大?。?/td> | 714K |
| 代理商： | ADP3502 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
REV. 0
–22–
ADP3502
RESET
RESETIN– Signal
The internal reset function is activated by the external reset input,
RESETIN–, and is an asynchronous signal. The internal reset
signal is used in the following blocks:
Serial I/F
Interrupt control
Stay-alive timer
Registers (refer to the Register section for additional
information).
LDOs, controlled by Serial I/F, are applied “RESET” by
RESETIN–. LDO5, LDO7, LDO8, LDO9, LDO10, and REFO
are set to “0,” and LDO4 and LDO11 are set to “1.” In case
RESETIN– has noise, the internal circuit may be in reset and
cause the system to have an unexpected result. Take care to avoid
this situation. RESETIN– is level translated from LDO1 to both
VBAT and RTCV supplies.
RESET Output Control and 32 kHz Output Control
Using a voltage detect signal, the device generates 32K OUT,
RSTDELAY–, RESETOUT–, and RESET signals. About 32 ms
after the RTC Voltage Detect (voltage detect signal in RTCV
supply) signal goes from “0” to “1,” the 32K OUT signal is
generated from the internal RTC_CLK32K signal. RSTDELAY
N (RSTDELAY–) goes to “0” when the RTC Voltage Detect is
“0,” and it goes to “1” at 50 ms after the “0” to “1” transition of
the RTC Voltage Detect. RESETOUT N (RESETOUT–) and
RESET toggle their states. Signal CLK512 is a 512 Hz, which
is generated in USEC counter block.
SERIAL INTERFACE
SERIAL I/F WRITE TIMING
ADDR5
ADDR4 0
CTRL1 (W)
CTRL2 (W)
DATA7 1
DATA0
t
CSR
t
CSH
t
CKL
t
CKH
t
CSS
t
CKS
t
DS
t
DH
CS
CLKIN
SERIAL
DATA
SERIAL I/F READ TIMING SINGLE MODE
ADDR5
ADDR4 0
CTRL1 (R)
CTRL2 (R)
DATA7 1
DATA0
t
CSR
t
CKL
t
CKH
t
CSS
t
CKS
t
DS
t
DH
CS
CLKIN
SERIAL
DATA
t
CSZ
t
RD
SERIAL I/F READ TIMING CONTINUOUS MODE
ADDR5
ADDR4 0
CTRL1 (R)
CTRL2 (R)
DATA7 1
DATA0
t
CKL
t
CKH
t
CSS
t
CKS
t
DS
t
DH
CS
CLKIN
SERIAL
DATA
t
RZ
t
RD
ADDR5
ADDR4
Figure 7. Serial Interface Signal
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADP3502ASU | CDMA Power Management System |
| ADP3510 | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 |
| ADP3510ARU | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 |
| ADP3522 | GSM Power Management System |
| ADP3522ACP-1.8 | GSM Power Management System |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADP3502ASU | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA Power Management System |
| ADP3502ASU-REEL | 制造商:Analog Devices 功能描述:CDMA Power Management System 64-Pin TQFP T/R |
| ADP3510 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA Power Management System |
| ADP3510ARU | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA Power Management System |
| ADP3510ARU-REEL7 | 制造商:Analog Devices 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。