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參數(shù)資料
| 型號： | ADN4604ASVZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CROSSPOINT SWIT 16X16 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | XStream™ |
| 功能： | 交叉點(diǎn)開關(guān) |
| 電路： | 1 x 16:16 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 3.6 V |
| 電流 - 電源： | 95mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP-EP（14x14） |
| 包裝： | 托盤 |
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ADN4604
Data Sheet
Rev. A | Page 26 of 40
SPI SERIAL CONTROL INTERFACE
The SPI serial interface of the ADN4604 consists of four wires:
CS , SCK, SDI, and SDO. CS is used to select the device when
more than one device is connected to the serial clock and data
lines. CS is also used to distinguish between read and write
commands (see Figure 48). SCK is used to clock data in and out
of the part. Data can either contain eight bits of register address
or data.
The SDI line is used to write to the registers, and the SDO line
is used to read data back from the registers. Data on SDI is
clocked on the rising edge of SCK. Data on SDO changes on the
falling edge of SCK. The recommended pull-up resistor value is
between 500 Ω and 1 kΩ. Strong pull-ups are needed when
serial clock speeds that are close to the maximum limit are used
or when the SPI interface lines are experiencing large capacitive
loading. Larger resistor values can be used for pull-up resistors
when the serial clock speed is reduced.
The part operates in slave mode and requires an externally
applied serial clock to the SCLK input. The serial interface is
designed to allow the part to be interfaced to systems that
provide a serial clock that is synchronized to the serial data.
Write Operation
Figure 48 shows the diagram for a write operation to the
ADN4604. Data is clocked into the registers on the rising edge
of SCK. When the CS line is high, the SDI and SDO lines are in
three-state mode. Only when the CS goes from high to low does
the part accept any data on the SDI line. To allow continuous
writes, the address pointer register auto-increments by one
without having to load the address pointer register each time.
Subsequent data bytes are written into sequential registers. Note
that not all registers in the 256-byte address space exist and not
all registers are writable. Zeroes should be entered for
nonexisting address fields when implementing a continuous
write operation. Address 0xD0 to Address 0xEF are reserved
and should not be overwritten. A continuous write sequence is
shown in Figure 49.
Read Operation
Figure 48 shows the diagram for a write operation to the
ADN4604. To read back from a register, first write to the
address pointer register with the desired starting address. A
read command is distinguished from a write command by the
occurrence of CS going high after the address pointer is written.
Subsequent clock cycles with CS asserted low stream data
starting from the desired register address onto SDO, MSB first.
SDO changes on the falling edge of SCK.
Multiple data reads are possible in SPI interface mode as the
address pointer register is auto-incremented. A continuous read
sequence is shown in Figure 50.
SDI
ADDRESS
XXXXXXXX
SDO
DATA
CS
WRITE OPERATION
HI-Z
READ OPERATION
SDI
ADDRESS
DATA
SDO
CS
07
93
4-
04
8
Figure 48. SPI—Correct Use of CS During SPI Communications
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| ADN4604ASVZ-RL | 功能描述:IC CROSSPOINT SWIT 16X16 100TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:XStream™ 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| ADN4604-EVALZ | 制造商:Analog Devices 功能描述:EVALUATION BOARD - Boxed Product (Development Kits) |
| ADN4604XSVZ | 制造商:Analog Devices 功能描述:4.25GBPS 16X16 CROSSBAR SWITCH - Trays |
| ADN4605 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4.25 Gbps 40 × 40 Digital Crosspoint Switch 3 dB, 6 dB, or 12 dB boost |
| ADN4605_1111 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4.25 Gbps 40 ?? 40 Digital |
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