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參數(shù)資料
| 型號： | ADM1073ARU-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/24頁 |
| 文件大小： | 370K |
| 描述： | IC CTRLR HOTSWAP -48V 14TSSOP |
| 標準包裝： | 2,500 |
| 類型： | 熱交換控制器 |
| 應用： | 通用 |
| 內(nèi)部開關(guān)： | 無 |
| 電源電壓： | -35 V ~ -80 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-ADM1073MEBZ-ND - BOARD EVALUATION FOR ADM1073 |
Data Sheet
ADM1073
Rev. B | Page 17 of 24
UV (Undervoltage)
The voltage on the UV pin is compared to an internal 0.868 V
reference. For the implementation in Figure 33, the undervolt-
age level is then set as
V
UV
= 0.868 ?(R1 + R2)/R2
If the UV pin voltage is less than 0.868 V and the comparator
trips, an internal 5 礎(chǔ) current sink is turned on. This pulls the
UV voltage down by
V
UVHYST(PIN)
= 5 礎(chǔ) ?R1 ?R2/(R1 + R2)
at the UV pin, or by
V
UVHYST(SUPPLY)
= 5 礎(chǔ) ?R1
at the supply.
In this manner, the user can program the value of the voltage
hysteresis by varying the parallel impedance of the resistor
divider. The UV comparator has an internal 0.6 ms time delay
to prevent nuisance shutdowns under noisy supply conditions.
OV (Overvoltage)
The voltage on the UV pin is compared to an internal 1.93 V
reference. For the implementation in Figure 33, the overvoltage
level is then set as
VOV = 1.93 ?(R3 + R4)/R4
If the OV pin voltage exceeds 1.93 V and the comparator trips,
an internal 5 礎(chǔ) current source is turned on. This pulls the OV
voltage up by
V
OVHYST(PIN)
= 5 礎(chǔ) ?R3 ?R4/(R3 + R4)
at the OV pin, or by
VOVHYST(SUPPLY) = 5 礎(chǔ) ?R3
at the supply.
In this manner, the user can program the value of the voltage
hysteresis by varying the parallel impedance of the resistor
divider. The OV comparator has an internal 5 祍 time delay.
If the voltage on UV or OV goes out of range (below 0.868 V on
UV or above 1.93V on OV), GATE is pulled low. If the supply
subsequently reenters the operating voltage window, the
ADM1073 restores the GATE drive.
Hysteresis must be considered when reentering the operating
window, that is, VUV must increase above
0.868 V + VUVHYST(SUPPLY)
when recovering from an undervoltage fault, and V
OV
must
drop below
1.93 V V
OVHYST(SUPPLY)
when recovering from an overvoltage fault for GATE to be
restored.
Alternative UV and OV Configurations
A 2-resistor or a 3-resistor implementation can also be used to
set the UV and OV levels (see Figure 34 and Figure 35).
ADM1073
48V RTN
48V IN
R2
R1 OV
UV
Figure 34. 2-Resistor UV/OV Implementation
ADM1073
48V RTN
48V IN
R3
R1
R2
OV
UV
Figure 35. 3-Resistor UV/OV Implementation
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