參數(shù)資料
型號: ADM1073ARU-REEL
廠商: Analog Devices Inc
文件頁數(shù): 13/24頁
文件大?。?/td> 370K
描述: IC CTRLR HOTSWAP -48V 14TSSOP
標(biāo)準(zhǔn)包裝: 2,500
類型: 熱交換控制器
應(yīng)用: 通用
內(nèi)部開關(guān):
電源電壓: -35 V ~ -80 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
配用: EVAL-ADM1073MEBZ-ND - BOARD EVALUATION FOR ADM1073
Data Sheet
ADM1073
 
Rev. B | Page 13 of 24
FUNCTIONAL DESCRIPTION
HOT CIRCUIT INSERTION
Inserting circuit boards into a live 48 V backplane can cause
large transient currents to be drawn as the board capacitance
charges up. These transient currents can cause glitches on the
system power supply and can permanently damage the board
connectors and components.
The ADM1073 is designed to control the manner in which a
boards supply voltage is applied so that harmful transient
currents do not occur and the board can be safely inserted or
removed from a live backplane. Undervoltage, overvoltage, and
overcurrent protection are other features of the part. The
ADM1073 ensures that the input voltage is stable and within
tolerance before being applied to the power module.
INITIAL STARTUP
The ADM1073 hot swap controller normally resides on a
removable circuit board and controls the manner in which
power is applied to the board upon connection. This is achieved
using a FET, Q1, in the power path (see Figure 31). By
controlling the gate voltage of the transistor, the surge of current
to charge load capacitance can be limited to a safe value when
the board makes connection. The ADM1073 can also reside on
the backplane itself and perform the same function from there.
Figure 32 shows a typical ADM1073 application circuit. When
the plug-in board is inserted into the live backplane, the 48 V
and 0 V lines connect to the live supply. This powers up the
device with the voltage on V
IN
 exceeding V
LKO
. When the
voltage on the UV pin exceeds the undervoltage rising
threshold (0.868 V), it is now inside the programmed operating
voltage window. It must stay inside this window for the duration
of the power-on reset delay time, tPOR (150 ms).
SHDN
RESTART
R
DROP
R
DRAIN
LATCHED
SPLYGD
PWRGD
ADM1073
C
TIMER
C
SS
C
LOAD
R4
R3
R2
R1
DC-DC
CONVERTER
V
IN
+
V
IN

R
SENSE
FET
LIVE
ACKPLANE
0V
48V
PLUG-IN BOARD
 
Figure 31. ADM1073 Topology
FAULT TIMER
AND CONTROL
OSCILLATOR
PWM
TIMEOUT
FOLDBACK
AND PWRGD
5 SECOND
SHUTDOWN
TIMER CONTROL
SOFT START
CONTROL
UNDERVOLTAGE
DETECTOR
OVERVOLTAGE
DETECTOR
V
CC
AND
REFERENCE
GENERATOR
LATCHED
RESTART
SPLYGD
V
IN
OV
UV
SS
TIMER
SHDN
V
EE
SENSE
GATE
DRAIN
R
DRAIN
PWRGD
100mV(MAX)
50A
V
IN
FET
R
SENSE
R
DROP
DC-DC
CONVERTER
5V
3.3V
2.8V
...etc.
GND
R1
R2
R
TIMER
*
C
TIMER
R3
R4
C
SS
48V RTN
48V
V
EE
*R
TIMER
 ISAN OPTIONAL COMPONENT
 
Figure 32. ADM1073 Application Diagram  
 
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