參數(shù)資料
型號(hào)： ADM1031ARQZ
廠商： ANALOG DEVICES INC
元件分類： 溫度/濕度傳感器
英文描述： DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 3Cel, RECTANGULAR, SURFACE MOUNT
封裝： LEAD FREE, MO-137AB, QSOP-16
文件頁(yè)數(shù)： 6/36頁(yè)
文件大?。?/td> 596K
代理商： ADM1031ARQZ
ADM1031
Rev. B | Page 14 of 36
2.
If the temperature exceeds the THERM limit, the THERM
output asserts low. This can be used to throttle the CPU
clock. If the THERM-to-Fan Enable bit (Bit 7 of THERM
behavior/revision register) is cleared to 0, then the fans do
not run full-speed. The THERM limit can be programmed
at a lower temperature than the high temperature limit.
This allows the system to run in silent mode, where the
CPU can be throttled while the cooling fan is off. If the
temperature continues to increase, and exceeds the high
temperature limit, an INT is generated. Software can then
decide whether the fan should run to cool the CPU. This
allows the system to run in silent mode.
3.
If the THERM-to-Fan Enable bit is set to 1, then the fan
runs full-speed whenever THERM is asserted low. In this
case, both throttling and active cooling take place. If the
high temperature limit is programmed to a lower value
than the THERM limit, exceeding the high temperature
limit asserts INT low. Software could change the speed of
the fan depending on temperature readings. If the
temperature continues to increase and exceeds the
THERM limit, THERM asserts low to throttle the CPU
and the fan runs full-speed. This allows the system to run
in performance mode, where active cooling takes place and
the CPU is only throttled at high temperature.
Using the high temperature limit and the THERM limit in this
way allows the user to gain maximum performance from the
system by only slowing it down, should it be at a critical
temperature.
Although the ADM1031 does not have a dedicated interrupt
mask register, clearing the appropriate enable bits in
Configuration Register 2 clears the appropriate interrupts and
masks out future interrupts on that channel. Disabling interrupt
bits prevents out-of-limit conditions from generating an
interrupt or setting a bit in the status registers.
USING THERM AS AN INPUT
The THERM pin is an open-drain input/output pin. When used
as an output, it signals overtemperature conditions. When
asserted low as an output, the fan is driven full-speed if the
THERM-to-Fan Enable bit is set to 1 (Bit 7 of Register 0×3F).
When THERM is pulled low as an input, the THERM bit (Bit 7)
of Status Register 2 is set to 1, and the fans are driven full-speed.
Note that the THERM-to-Fan Enable bit has no effect whenever
THERM is used as an input. If THERM is pulled low as an
input, and the THERM-to-Fan Enable bit = 0, then the fans are
still driven full-speed. The THERM-to-Fan Enable bit only
affects the behavior of THERM when used as an output.
STATUS REGISTERS
All out-of-limit conditions are flagged by status bits in
Status Register 1 (0×02) and Status Register 2 (0×03). Bit 0
(Alarm Speed) and Bit 1 (Fan Fault) of Status Register 1,
once set, can be cleared by reading Status Register 1. Once
the alarm speed bit is cleared, this bit is not reasserted on the
next monitoring cycle even if the condition still persists. This
bit can be reasserted only if the fan is no longer at alarm speed.
Bit 1 (Fan Fault) is set whenever a fan tach failure is detected.
Once cleared, it reasserts on subsequent fan tach failures.
Bit 2 and Bit 3 of Status Register 1 and Status Register 2 are the
Remote 1 and Remote 2 Temperature High and Low status bits.
Exceeding the high or low temperature limits for the external
channel sets these status bits. Reading the status register clears
these bits. However, these bits are reasserted if the out-of-limit
condition still exists on the next monitoring cycle. Bit 6 and Bit 7
are the Local Temperature High and Low status bits. These
behave exactly the same as the Remote Temperature High and
Low status bits. Bit 4 of Status Register 1 indicates that the
Remote Temperature THERM limit has been exceeded. This bit
gets cleared on a read of Status Register 1 (see Figure 21). Bit 5
indicates a remote diode error. This bit is a 1 if a short or open is
detected on the remote temperature channel on power-up. If this
bit is set to 1 on power-up, it cannot be cleared. Bit 6 of Status
Register 2 (0×03) indicates that the Local THERM limit has been
exceeded. This bit is cleared on a read of Status Register 2. Bit 7
indicates that THERM has been pulled low as an input. This bit
can also be cleared on a read of Status Register 2.
5
°
INT REARMED
STATUS REG. READ
TEMP
THERM LIMIT
THERM
INT
02402-021
Figure 21. Operation of THERM and INT Signals
Figure 21 shows the interaction between INT and THERM.
Once a critical temperature THERM limit is exceeded, both
INT and THERM assert low. Reading the status registers clears
the interrupt and the INT pin goes high. However, the THERM
pin remains asserted until the measured temperature falls 5°C
below the exceeded THERM limit. This feature can be used to
CPU throttle or drive a fan full speed for maximum cooling.
Note that the INT pin for that interrupt source is not rearmed
until the temperature has fallen below the THERM limit –5°C.
This prevents unnecessary interrupts from tying up valuable
CPU resources.
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