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參數(shù)資料
| 型號： | ADM1031ARQZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 溫度/濕度傳感器 |
| 英文描述： | DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 3Cel, RECTANGULAR, SURFACE MOUNT |
| 封裝： | LEAD FREE, MO-137AB, QSOP-16 |
| 文件頁數(shù)： | 2/36頁 |
| 文件大?。?/td> | 596K |
| 代理商： | ADM1031ARQZ |
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ADM1031
Rev. B | Page 10 of 36
2.
Data is sent over the serial bus in sequences of nine clock
pulses, eight bits of data, followed by an acknowledge bit
from the slave device. Transitions on the data line must
occur during the low period of the clock signal and remain
stable during the high period, as a low-to-high transition
when the clock is high can be interpreted as a stop signal.
The number of data bytes that can be transmitted over the
serial bus in a single read or write operation is limited only
by what the master and slave devices can handle.
3.
When all data bytes have been read or written, stop
conditions are established. In write mode, the master pulls
the data line high during the tenth clock pulse to assert a
stop condition. In read mode, the master device overrides
the acknowledge bit by pulling the data line high during
the low period before the ninth clock pulse. This is known
as No Acknowledge. The master then takes the data line
low during the low period before the tenth clock pulse,
then high during the tenth clock pulse to assert a stop
condition.
Any number of bytes of data can be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation, because the type of operation is determined at
the beginning and cannot subsequently be changed without
starting a new operation.
In the case of the ADM1031, write operations contain either
one byte or two bytes, and read operations contain one byte,
and perform the functions described next.
Writing Data to a Register
To write data to one of the device data registers or read data
from it, the address pointer register must be set so that the
correct data register is addressed; data can then be written to
that register or read from it. The first byte of a write operation
always contains an address that is stored in the address pointer
register. If data is to be written to the device, the write operation
contains a second data byte that is written to the register
selected by the address pointer register.
This is illustrated in Figure 16. The device address is sent over
the bus followed by R/W set to 0. This is followed by two data
bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the address pointer
register. The second data byte is the data to be written to the
internal data register.
Reading Data from a Register
When reading data from a register there are two possibilities:
1.
If the ADM1031’s address pointer register value is
unknown or not the desired value, it is first necessary to set
it to the correct value before data can be read from the
desired data register. This is done by performing a write to
the ADM1031 as before, but only the data byte containing
the register address is sent, as data is not to be written to
the register. This is shown in Figure 17.
A read operation is then performed consisting of the serial
bus address, R/W bit set to 1, followed by the data byte
read from the data register. This is shown in Figure 18.
2.
If the address pointer register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the address pointer
register, so Figure 17 can be omitted.
Notes
Although it is possible to read a data byte from a data
register without first writing to the address pointer register,
if the address pointer register is already at the correct value,
it is not possible to write data to a register without writing
to the address pointer register. This is because the first data
byte of a write is always written to the address pointer
register.
address is shown as the default value 01011(A1)(A0),
where A1 and A0 are set by the three-state ADD pin.
The ADM1031 also supports the Read Byte protocol, as
described in the system management bus specification.
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