參數(shù)資料
型號(hào): ADF4360-8BCPZRL7
廠商: Analog Devices Inc
文件頁數(shù): 14/24頁
文件大?。?/td> 0K
描述: IC SYNTHESIZER VCO 24-LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: 扇出配送,整數(shù)-N,合成器(RF)
PLL:
輸入: CMOS
輸出: 時(shí)鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 400MHz
除法器/乘法器: 是/無
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 551 (CN2011-ZH PDF)
其它名稱: ADF4360-8BCPZRL7DKR
ADF4360-8
Rev. A | Page 21 of 24
APPLICATIONS
CHOOSING THE CORRECT INDUCTANCE VALUE
The ADF4360-8 can be used at many different frequencies
simply by choosing the external inductors to give the correct
output frequency. Figure 22 shows a graph of both minimum
and maximum frequency vs. the external inductor value. The
correct inductor should cover the maximum and minimum
frequencies desired. The inductors used are 0603 CS or 0805 CS
type from Coilcraft. To reduce mutual coupling, the inductors
should be placed at right angles to one another.
The lowest center frequency of oscillation possible is approxi-
mately 65 MHz, which is achieved using 560 nH inductors. This
relationship can be expressed by
()
EXT
O
L
F
+
=
nH
0.9
pF
9.3
1
where FO is the center frequency and LEXT is the external induc-
tance.
0
150
50
100
350
250
300
200
450
400
0
100
200
300
400
600
500
INDUCTANCE (nH)
FRE
Q
UE
NCY
(MHz)
04763-025
Figure 22. Output Center Frequency vs. External Inductor Value
The approximate value of capacitance at the midpoint of the
center band of the VCO is 9.3 pF, and the approximate value of
internal inductance due to the bond wires is 0.9 nH. The VCO
sensitivity is a measure of the frequency change vs. the tuning
voltage. It is a very important parameter for the low-pass filter.
Figure 23 shows a graph of the tuning sensitivity (in MHz/V) vs.
the inductance (nH). It can be seen that as the inductance in-
creases, the sensitivity decreases. This relationship can be de-
rived from the equation above; that is, since the inductance has
increased, the change in capacitance from the varactor has less
of an effect on the frequency.
0
4
2
10
8
6
12
0
100
200
300
400
600
500
INDUCTANCE (nH)
SENSITIVITY
(
M
Hz/V)
04763-026
Figure 23. Tuning Sensitivity (in MHz/V) vs. Inductance (nH)
FIXED FREQUENCY LO
Figure 24 shows the ADF4360-8 used as a fixed frequency LO at
200 MHz. The low-pass filter was designed using ADIsimPLL
for a channel spacing of 2 MHz and an open-loop bandwidth of
100 kHz. The maximum PFD frequency of the ADF4360-8 is
8 MHz. Since using a larger PFD frequency allows the use of a
smaller N, the in-band phase noise is reduced to as low as pos-
sible, 109 dBc/Hz. The typical rms phase noise (100 Hz to
100 kHz) of the LO in this configuration is 0.09°. The reference
frequency is from a 16MHz TCXO from Fox; thus, an R value of
2 is programmed. Taking into account the high PFD frequency
and its effect on the band select logic, the band select clock
divider is enabled. In this case, a value of 8 is chosen. A very
simple shunt inductor and dc-blocking capacitor complete the RF
output stage.
SPI
-C
OMPA
TI
B
L
E
SER
IA
L
B
U
S
ADF4360-8
VVCO
FOX
801BE-160
16MHz
VVCO
CPGND
AGND DGND L1 L2 RF
OUTB
RFOUTA
CP
1nF
47pF
68nH
470
68nH
470
22nF
56nH
680pF
51
100pF
1nF
10
F
4.7k
6.8k
15k
RSET
CC
LE
DATA
CLK
REFIN
CN
VTUNE
DVDD AVDD CE MUXOUT
5
4
24
7
20
23
2
21
6
14
16
17
18
19
13
1
3
8
9
10
11 22
15
12
VVDD
LOCK
DETECT
04763-
027
Figure 24. Fixed Frequency LO
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