參數資料
| 型號： | ADF4360-8BCPZRL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 10/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SYNTHESIZER VCO 24-LFCSP |
| 標準包裝： | 1 |
| 類型： | 扇出配送，整數-N，合成器（RF） |
| PLL： | 是 |
| 輸入： | CMOS |
| 輸出： | 時鐘 |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 400MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 標準包裝 |
| 產品目錄頁面： | 551 (CN2011-ZH PDF) |
| 其它名稱： | ADF4360-8BCPZRL7DKR |
ADF4360-8
Rev. A | Page 18 of 24
Hardware Power-Up/Power-Down
If the part is powered down via the hardware (using the CE pin)
and powered up again without any change to the N counter
register during power-down, the part locks at the correct fre-
quency, because the part is already in the correct frequency
band. The lock time depends on the value of capacitance on the
CN pin, which is <15 ms for 10 F capacitance. The smaller
capacitance of 440 nF on this pin enables lock times of <600 s.
The N counter value cannot be changed while the part is in
power-down, since the part may not lock to the correct
frequency on power-up. If it is updated, the correct program-
ming sequence for the part after power-up is the R counter
latch, followed by the control latch, and finally the N counter
latch, with the required interval between the control latch and N
counter latch, as described in the Initial Power-Up section.
Software Power-Up/Power-Down
If the part is powered down via the software (using the control
latch) and powered up again without any change to the N
counter latch during power-down, the part locks at the correct
frequency, because the part is already in the correct frequency
band. The lock time depends on the value of capacitance on the
CN pin, which is <15 ms for 10 F capacitance. The smaller
capacitance of 440 nF on this pin enables lock times of <600 s.
The N counter value cannot be changed while the part is in
power-down, because the part may not lock to the correct
frequency on power-up. If it is updated, the correct program-
ming sequence for the part after power-up is to the R counter
latch, followed by the control latch, and finally the N counter
latch, with the required interval between the control latch and N
counter latch, as described in the Initial Power-Up section.
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| ADF4360-8BCPZRL71 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Integrated Synthesizer and VCO |
| ADF4360-9 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Clock Generator PLL with Integrated VCO |
| ADF4360-9BCPZ | 功能描述:IC SYNTHESIZER W/ADJ VCO 24LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4360-9BCPZRL | 功能描述:IC SYNTHESIZER W/ADJ VCO 24LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4360-9BCPZRL7 | 功能描述:IC SYNTHESIZER W/ADJ VCO 24LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數:1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
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