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| 型號： | ADAU1761BCPZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 30/92頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SIGMADSP CODEC PLL 32LFCSP |
| 設(shè)計資源： | Stereo Digital Microphone Input Using ADAU1761 and ADMP421 (CN0078) |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 系列： | SigmaDSP® |
| 類型： | 音頻編解碼器 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數(shù)量： | 2 / 2 |
| 三角積分調(diào)變： | 是 |
| 電壓 - 電源，模擬： | 1.8 V ~ 3.65 V |
| 電壓 - 電源，數(shù)字： | 1.63V ~ 3.65V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-ADAU1761Z-ND - BOARD EVAL FOR ADAU1761 |
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ADAU1761
Rev. C | Page 36 of 92
HEADPHONE OUTPUT
The LHP and RHP pins can be driven by either a line output
driver or a headphone driver by setting the HPMODE bit in
Register R30 (playback headphone right volume control register,
Address 0x4024). The headphone outputs can drive a load of at
least 16 Ω.
Separate volume controls for the left and right channels range
from 57 dB to +6 dB. Slew can be applied to all the playback
volume controls using the ASLEW[1:0] bits in Register R34
(playback pop/click suppression register, Address 0x4028).
Capless Headphone Configuration
The headphone outputs can be configured in a capless output
configuration with the MONOOUT pin used as a dc virtual
ground reference. Figure 45 depicts a typical playback path in
a capless headphone configuration. Table 19 lists the register
settings for this configuration. As shown in this table, the
MONOOUT pin outputs common mode (AVDD/2), which
is used as the virtual headphone reference.
LHP
RHP
MONOOUT
MIXER 3
LEFT
DAC
MX3LM
LHPVOL[5:0]
MX3EN
MIXER 4
RIGHT
DAC
MX4RM
RHPVOL[5:0]
MX4EN
MIXER 7
MX7[1:0]
MONOM
MOMODE
MX7EN
0
76
80
-06
2
Figure 45. Capless Headphone Configuration Diagram
Table 19. Capless Headphone Register Settings
Register
Bit Name
Setting
R36
DACEN[1:0]
11 = both DACs on
MX3EN
1 = enable Mixer 3
R22
MX3LM
1 = unmute left DAC input
MX4EN
1 = enable Mixer 4
R24
MX4RM
1 = unmute right DAC input
MX7EN
1 = enable Mixer 7
R28
MX7[1:0]
00 = common-mode output
MONOM
1 = unmute mono output
R33
MOMODE
1 = headphone output
LHPVOL[5:0]
Desired volume for LHP output
R29
LHPM
1 = unmute left headphone output
HPMODE
1 = headphone output
RHPVOL[5:0]
Desired volume for RHP output
R30
RHPM
1 = unmute right headphone output
Headphone Output Power-Up/Power-Down Sequencing
To prevent pops when turning on the headphone outputs, the
user must wait at least 4 ms to unmute these outputs after
enabling the headphone output with the HPMODE bit. This is
because of an internal capacitor that must charge before these
headphone power-up/power-down sequencing.
For capless headphones, configure the MONOOUT pin before
unmuting the headphone outputs.
4ms
USER
DEFINED
HPMODE
1 = HEADPHONE
INTERNAL
PRECHARGE
RHPM AND LHPM
1 = UNMUTE
07
68
0-
04
6
Figure 46. Headphone Output Power-Up Timing
HPMODE
0 = LINE OUTPUT
RHPM AND LHPM
0 = MUTE
USER DEFINED
07
68
0-
04
7
Figure 47. Headphone Output Power-Down Timing
Ground-Centered Headphone Configuration
The headphone outputs can also be configured as ground-
centered outputs by placing coupling capacitors on the LHP
and RHP pins. Ground-centered headphones should use the
AGND pin as the ground reference.
When the headphone outputs are configured in this manner,
the capacitors create a high-pass filter on the outputs. The
corner frequency of this filter, at which point its attenuation
is 3 dB, is calculated by the following formula:
f3dB = 1/(2π × R × C)
where:
C is the capacitor value.
R is the impedance of the headphones.
For a typical headphone impedance of 16 Ω and a 47 μF
capacitor, the corner frequency is 211 Hz.
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| ADAU1772BCPZ | 功能描述:接口—CODEC Low Latency Noise and Power CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| ADAU1772BCPZ-R7 | 功能描述:接口—CODEC Low Latency Noise and Power CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| ADAU1772BCPZ-RL | 功能描述:接口—CODEC Low Latency Noise and Power CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| ADAU1777BCBZRL | 功能描述:LOW LATENCY NOISE AND POWER CODE 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):在售 類型:音頻 數(shù)據(jù)接口:I2C，SPI? 分辨率（位）:24 b ADC/DAC 數(shù):4 / 2 三角積分:無 信噪比，ADC/DAC（db）（典型值）:102 / 108 動態(tài)范圍，ADC/DAC（db）（典型值）:- 電壓 - 電源，模擬:1.71 V ~ 3.63 V 電壓 - 電源，數(shù)字:1.045 V ~ 1.98 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-WFBGA，WLCSP 供應(yīng)商器件封裝:36-WLCSP（3.77x3.20） 標(biāo)準(zhǔn)包裝:5,000 |
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