參數(shù)資料
型號(hào)： ADAU1761BCPZ-RL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 1/92頁(yè)
文件大?。?/td> 0K
描述： IC SIGMADSP CODEC PLL 32LFCSP
設(shè)計(jì)資源： Stereo Digital Microphone Input Using ADAU1761 and ADMP421 (CN0078)
標(biāo)準(zhǔn)包裝： 5,000
系列： SigmaDSP®
類型： 音頻編解碼器
數(shù)據(jù)接口： 串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 2 / 2
三角積分調(diào)變： 是
電壓 - 電源，模擬： 1.8 V ~ 3.65 V
電壓 - 電源，數(shù)字： 1.63V ~ 3.65V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ
包裝： 帶卷 (TR)
配用： EVAL-ADAU1761Z-ND - BOARD EVAL FOR ADAU1761
SigmaDSP Stereo, Low Power, 96 kHz,
24-Bit Audio Codec with Integrated PLL
ADAU1761
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2009–2010 Analog Devices, Inc. All rights reserved.
FEATURES
SigmaDSP 28-/56-bit, 50 MIPS digital audio processor
Fully programmable with SigmaStudio graphical tool
24-bit stereo audio ADC and DAC: >98 dB SNR
Sampling rates from 8 kHz to 96 kHz
Low power: 7 mW record, 7 mW playback, 48 kHz at 1.8 V
6 analog input pins, configurable for single-ended or
differential inputs
Flexible analog input/output mixers
Stereo digital microphone input
Analog outputs: 2 differential stereo, 2 single-ended stereo,
1 mono headphone output driver
PLL supporting input clocks from 8 MHz to 27 MHz
Analog automatic level control (ALC)
Microphone bias reference voltage
Analog and digital I/O: 1.8 V to 3.65 V
I2C and SPI control interfaces
Digital audio serial data I/O: stereo and time-division
multiplexing (TDM) modes
Software-controllable clickless mute
Software power-down
GPIO pins for digital controls and outputs
32-lead, 5 mm × 5 mm LFCSP
40°C to +85°C operating temperature range
APPLICATIONS
Smartphones/multimedia phones
Digital still cameras/digital video cameras
Portable media players/portable audio players
Phone accessories products
GENERAL DESCRIPTION
The ADAU1761 is a low power, stereo audio codec with
integrated digital audio processing that supports stereo 48 kHz
record and playback at 14 mW from a 1.8 V analog supply. The
stereo audio ADCs and DACs support sample rates from 8 kHz
to 96 kHz as well as a digital volume control.
The SigmaDSP core features 28-bit processing (56-bit double
precision). The processor allows system designers to compensate
for the real-world limitations of microphones, speakers, amplifiers,
and listening environments, resulting in a dramatic improvement
in the perceived audio quality through equalization, multiband
compression, limiting, and third-party branded algorithms.
The SigmaStudio graphical development tool is used to program
the ADAU1761. This software includes audio processing blocks
such as filters, dynamics processors, mixers, and low level DSP
functions for fast development of custom signal flows.
The record path includes an integrated microphone bias circuit
and six inputs. The inputs can be mixed and muxed before the
ADC, or they can be configured to bypass the ADC. The
ADAU1761 includes a stereo digital microphone input.
The ADAU1761 includes five high power output drivers (two
differential and three single-ended), supporting stereo head-
phones, an earpiece, or other output transducer. AC-coupled
or capless configurations are supported. Individual fine level
controls are supported on all analog outputs. The output mixer
stage allows for flexible routing of audio.
FUNCTIONAL BLOCK DIAGRAM
HP JACK
DETECTION
REGULATOR
INPUT
MIXERS
ALC
MICROPHONE
BIAS
PLL
LINN
LINP
LAUX
JACKDET/MICIN
RINP
RINN
RAUX
MICBIAS
LHP
LOUTN
LOUTP
ADAU1761
RHP
MONOOUT
ROUTP
ROUTN
CM
IOV
D
DG
ND
DV
D
DO
UT
AG
ND
AV
D
AV
D
AG
ND
OUTPUT
MIXERS
DAC
DIGITAL
FILTERS
ADC
DIGITAL
FILTERS
DAC
ADC
SDA/
COUT
I2C/SPI
CONTROL PORT
SERIAL DATA
INPUT/OUTPUT PORTS
MCLK
A
DC
_S
D
A
TA
/
GP
IO1
BC
LK
/
GP
IO2
SCL/
CCLK
ADDR1/
CDATA
ADDR0/
CLATCH
L
RCL
K
/
GP
IO3
DA
C_
S
DA
T
A/
GP
IO0
07
68
0-
00
1
Figure 1.
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