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參數(shù)資料
| 型號： | ADATE207BBPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 25/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TIMING FORMATTER QUAD 256BGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 四針定時格式器 |
| PLL： | 是 |
| 主要目的： | 自動測試設(shè)備 |
| 電路數(shù)： | 4 |
| 頻率 - 最大： | 100MHz |
| 電源電壓： | 2.375 V ~ 2.625 V |
| 工作溫度： | -25°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-LBGA 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 256-BGA（27x27） |
| 包裝： | 托盤 |
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ADATE207
Rev. 0 | Page 31 of 36
Position
Description
Reset State
Bit 01
Fail Counters Clear.
0x0
Writing a 1 to this bit creates a pulse to clear the fail counters for all channels.
Writing a 0 has no affect.
Bit 00
Soft Reset. Writing this register bit to a Logic 1 causes the ADATE207 to generate a software reset. This
is logically equivalent to a hard reset via the I_RESET_B pin. All logic and registers
are reset.
0x0
Name:
Round Trip Delay Value
Address:
0x1A
Type:
Read/Write
Table 34. Round Trip Delay Value
Position
Description
Reset State
Bits[15:05]
Not Used.
0x000
Bits[4:00]
Round Trip Delay Value. Programs the round-trip delay from the ADATE207 drive to compare pins, in
units of 2.5 ns. The maximum delay is 80 ns (value = 31) and the minimum delay is 2.5 ns (value = 0).
Name:
T0 Alignment Pipeline Depth
Address:
0x1B
Type:
Read/Write
Table 35. T0 Alignment Pipeline Depth
Position
Description
Reset State
Bits[15:05]
Not Used.
0x000
Bits[04:00]
T0 Alignment Pipeline Depth. This pipeline value matches the edge generation delay for compare
edges thereby correctly aligning compare fails and DUT data to the T0 pipeline. It should be
programmed no higher than 30 and ≥ 10.5+ RTD/4.
0x0
TMU Channel Select
This register selects one of four channels to independently direct to the TMU arm, start, and stop buses.
Name:
TMU Channel Select
Address:
0x1C
Type:
Read/Write
Table 36. TMU Channel Select
Position
Description
Reset State
Bits[15:12]
Not Used.
0x00
Bit 11
TMU Stop Enable. A zero tristates the TMU stop output.
0
Bits[10:08]
TMU Stop, Channel Select Multiplexer. A binary encoded data field.
0x00
0x0 selects Channel 0 comparator high.
0x1 selects Channel 0 comparator low.
0x2 selects Channel 1 comparator high.
0x3 selects Channel 1 comparator low.
0x4 selects Channel 2 comparator high.
0x5 selects Channel 2 comparator low.
0x6 selects Channel 3 comparator high.
0x7 selects Channel 3 comparator low.
Bit 07
TMU Start Enable. A zero tristates the TMU stop output.
0
Bits[06:04]
TMU Start, Channel Select Multiplexer. A binary encoded data field.
0x00
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