VD = 3.3 V, V
參數(shù)資料
型號: AD9981KSTZ-95
廠商: Analog Devices Inc
文件頁數(shù): 23/44頁
文件大小: 0K
描述: IC INTERFACE 10BIT ANALOG 80LQFP
標(biāo)準(zhǔn)包裝: 1
應(yīng)用: 視頻
接口: 模擬
電源電壓: 3.13 V ~ 3.47 V
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 管件
安裝類型: 表面貼裝
AD9981
Rev. 0 | Page 3 of 44
ANALOG INTERFACE SPECIFICATIONS
VD = 3.3 V, VDD = 3.3 V, PVD = 1.8 V, DAVDD = 1.8 V, ADC clock = maximum conversion rate , full temperature range = 0°C to 70°C.
Table 1. Electrical Characteristics
AD9981KSTZ-801
AD9981KSTZ-952
Parameter
Temp
Test
Level
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
Number of Bits
10
Bits
LSB Size
0..098
0.098
% of full
scale
DC ACCURACY
LSB
Differential Nonlinearity
80 MSPS Conversion Rate
25°C
Full
I
VI
0.3
0.4
1.0
1.8
0.3
0.4
1.0
1.8
LSB
Differential Nonlinearity
95 MSPS Conversion Rate
25°C
Full
I
VI
1.3
1.75
2.75
5.4
LSB
Integral Nonlinearity
80 MSPS Conversion Rate
25°C
Full
I
VI
±1.4
±3.75
±5.0
±1.4
±3.75
±5.0
LSB
Integral Nonlinearity
95 MSPS Conversion Rate
25°C
Full
I
VI
±2.7
±3.7
±4.75
±8.6
LSB
No Missing Codes
25°C
I
Guaranteed
ANALOG INPUT
Input Voltage Range
Minimum
Full
VI
0.5
V p-p
Maximum
Full
VI
1.0
V p-p
Gain Tempco
25°C
V
105
ppm/°C
Input Bias Current
25°C
V
1
A
Full
V
1
A
Input Full-Scale Matching
Full
VI
1
9
1
10
% FS
Offset Adjustment Range
Full
VI
44
% FS
SWITCHING PERFORMANCE
Maximum Conversion Rate
Full
VI
80
95
MSPS
Minimum Conversion Rate
Full
IV
10
MSPS
Clock to Data Skew tSKEW
Full
IV
0.5
+2
0.5
+2
ns
tBUFF
Full
VI
4.7
S
tSTAH
Full
VI
4.0
S
tDHO
Full
VI
0
S
tDAL
Full
VI
4.7
S
tDAH
Full
VI
4.0
S
tDSU
Full
VI
250
nS
tSTASU
Full
VI
4.7
S
tSTOSU
Full
VI
4.0
S
Maximum PLL Clock Rate
Full
VI
80
95
MHz
Minimum PLL Clock Rate
Full
IV
10
MHz
PLL Jitter
25°C
IV
750
980
ps p-p
Full
IV
ps p-p
Sampling Phase Tempco
Full
IV
15
ps/°C
DIGITAL INPUTS3
Input Voltage, High (VIH)
Full
VI
2.5
V
Input Voltage, Low (VIL)
Full
VI
0.8
V
Input Current, High (IIH)
Full
V
–82
A
Input Current, Low (IIL)
Full
V
82
A
Input Capacitance
25°C
V
2
pF
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