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參數(shù)資料
| 型號： | AD9913BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/32頁 |
| 文件大小： | 0K |
| 描述： | IC DDS 10BIT DAC 250MSPS 32LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 分辨率（位）： | 10 b |
| 主 fclk： | 250MHz |
| 調(diào)節(jié)字寬（位）： | 32 b |
| 電源電壓： | 1.8V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 552 (CN2011-ZH PDF) |
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AD9913
Rev. A | Page 28 of 32
REGISTER BIT DESCRIPTIONS
The serial I/O port registers span an address range of 0 to 16
(0x00 to 0x10 in hexadecimal notation). This represents a total
of 17 registers. However, one of these registers (0x05) is unused,
yielding a total of 16 available registers.
The registers are not of uniform depth; each contains the
number of bytes necessary for its particular function.
Additionally, the registers are assigned names according to their
functionality. In some cases, a register is given a mnemonic
descriptor. For example, the register at Serial Address 0x00 is
named Control Function Register 1 and is assigned the
mnemonic CFR1.
The following section provides a detailed description of each bit
in the AD9913 register map. For cases in which a group of bits
serve a specific function, the entire group is considered as a
binary word and described in aggregate.
This section is organized in sequential order of the serial
addresses of the registers. Each subheading includes the register
name and optional register mnemonic (in parentheses). Also
given is the serial address in hexadecimal format and the
number of bytes assigned to the register.
Following each subheading is a table containing the individual
bit descriptions for that particular register. The location of the
bit(s) in the register are indicated by a single number or a pair
of numbers separated by a colon. A pair of numbers (A:B)
indicates a range of bits from the most significant (A) to the
least significant (B). For example, 5:2 implies Bit Position 5
down to Bit Position 2, inclusive, with Bit 0 identifying the LSB
of the register.
Unless otherwise stated, programmed bits are not trans-
ferred to their internal destinations until the assertion of
the I/O_UPDATE pin.
Control Function Register 1 (CFR1)
Address 0x00; 4 bytes are assigned to this register.
Table 10. Bit Description for CFR1
Bit(s)
Bit Name
Description
31:29
Open
Leave these bits at their default values.
28
Modulus Enable
This bit is ignored if linear sweep is disabled.
0 = the auxiliary accumulator is used for linear sweep generation.
1 = the auxiliary accumulator is used for programmable modulus.
27
Use Internal Profile
0 = profiles are controlled by profile pins; only valid in serial mode.
1 = profiles are controlled by CFR1 [22:20].
26
Match Pipeline Delays Active
0 = the latency across the auxiliary accumulator, the phase offset word, and phase
accumulator are matched.
1 = the latency across the auxiliary accumulator, the phase offset word, and phase
accumulator are not matched.
25:24
Open
Leave these bits at the default values.
23
LSB First
0 = MSB first format is used.
1 = LSB first format is used.
22:20
Internal Profile Control
details on how to program these registers during linear sweep, and refer to the Direct
Switch Mode section for details on how to program these registers in direct switch mode.
19
Sync Clock Disable
0 = the SYNC_CLK pin is active.
1 = the SYNC_CLK pin assumes a static Logic 0 state (disabled). In this state, the pin drive
logic is shut down, minimizing the noise generated by the digital circuitry.
18:17
Open
Leave these bits in their default values.
16
Direct Switch Mode Active
0 = direct switch mode is disabled.
1 = direct switch mode is enabled.
15
Clear Auxiliary Accumulator
0 = normal operation of the auxiliary accumulator (default).
1 = asynchronous, static reset of the auxiliary accumulator. The ramp accumulator remains
reset as long as this bit remains set. This bit is synchronized with either an I/O update or a
profile change and the next rising edge of SYNC_CLK.
14
Clear Phase Accumulator
0 = normal operation of the DDS phase accumulator (default).
1 = asynchronous, static reset of the DDS phase accumulator.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9913BCPZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer |
| AD9913BCPZ-REEL7 | 功能描述:IC DDS 250MSPS 10BIT ADC 32LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9913BCPZ-REEL71 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer |
| AD9914 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC |
| AD9914/PCBZ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 3.5 GSPS DDS w/Upconverter eval bd. RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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