參數(shù)資料
型號(hào): AD9830ASTZ
廠商: Analog Devices Inc
文件頁數(shù): 13/16頁
文件大?。?/td> 0K
描述: IC DDS 10BIT 50MHZ CMOS 48-TQFP
產(chǎn)品培訓(xùn)模塊: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
標(biāo)準(zhǔn)包裝: 1
分辨率(位): 10 b
主 fclk: 50MHz
調(diào)節(jié)字寬(位): 32 b
電源電壓: 4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
產(chǎn)品目錄頁面: 552 (CN2011-ZH PDF)
配用: EVAL-AD9830EBZ-ND - BOARD EVALUATION AD9830
AD9830
–6–
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation of any code from a straight line
passing through the endpoints of the transfer function. The
endpoints of the transfer function are zero scale, a point 0.5
LSB below the first code transition (000 . . . 00 to 000 . . . 01)
and full scale, a point 0.5 LSB above the last code transition
(111 . . . 10 to 111 . . . 11). The error is expressed in LSBs.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between two adjacent codes in the DAC.
Signal to (Noise + Distortion)
Signal to (Noise + Distortion) is measured signal to noise at the
output of the DAC. The signal is the rms magnitude of the fun-
damental. Noise is the rms sum of all the nonfundamental sig-
nals up to half the sampling frequency (fMCLK/2) but excluding
the dc component. Signal to (Noise + Distortion) is dependent
on the number of quantization levels used in the digitization
process; the more levels, the smaller the quantization noise.
The theoretical Signal to (Noise + Distortion) ratio for a sine
wave input is given by
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB
where N is the number of bits. Thus, for an ideal 10-bit con-
verter, Signal to (Noise + Distortion) = 61.96 dB.
Total Harmonic Distortion
Total Harmonic Distortion (THD) is the ratio of the rms sum
of harmonics to the rms value of the fundamental. For the
AD9830, THD is defined as
THD
= 20log
(V2
2 +V
3
2 +V
4
2 +V
5
2 +V
6
2
V1
where V1 is the rms amplitude of the fundamental and V2, V3,
V4, V5 and V6 are the rms amplitudes of the second through the
sixth harmonic.
Output Compliance
The output compliance refers to the maximum voltage which
can be generated at the output of the DAC to meet the specifi-
cations. When voltages greater than that specified for the out-
put compliance are generated, the AD9830 may not meet the
specifications listed in the data sheet. For the AD9830, the
maximum voltage which can be generated by the DAC is 1V.
Spurious Free Dynamic Range
Along with the frequency of interest, harmonics of the funda-
mental frequency and images of the MCLK frequency will be
present at the output of a DDS device. The spurious free dy-
namic range (SFDR) refers to the largest spur or harmonic
which is present in the band of interest. The wideband SFDR
gives the magnitude of the largest harmonic or spur relative to
the magnitude of the fundamental frequency in the bandwidth
±2 MHz about the fundamental frequency. The narrowband
SFDR gives the attenuation of the largest spur or harmonic in a
bandwidth of
±200 kHz and ±50 kHz about the fundamental
frequency.
Clock Feedthrough
There will be feedthrough from the MCLK input to the analog
output. The clock feedthrough refers to the magnitude of the
MCLK signal relative to the fundamental frequency in the
AD9830’s output spectrum.
REV. B
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