參數(shù)資料
型號(hào): AD9830ASTZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/16頁(yè)
文件大?。?/td> 0K
描述: IC DDS 10BIT 50MHZ CMOS 48-TQFP
產(chǎn)品培訓(xùn)模塊: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
標(biāo)準(zhǔn)包裝: 1
分辨率(位): 10 b
主 fclk: 50MHz
調(diào)節(jié)字寬(位): 32 b
電源電壓: 4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 552 (CN2011-ZH PDF)
配用: EVAL-AD9830EBZ-ND - BOARD EVALUATION AD9830
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD9830
Analog Devices, Inc.,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax:
FEATURES
+5 V Power Supply
50 MHz Speed
On-Chip SINE Look-Up Table
On-Chip 10-Bit DAC
Parallel Loading
Power-Down Option
72 dB SFDR
250 mW Power Consumption
48-Pin
QFP
APPLICATIONS
DDS Tuning
Digital Demodulation
GENERAL DESCRIPTION
This DDS device is a numerically controlled oscillator em-
ploying a phase accumulator, a sine look-up table and a
10-bit D/A converter integrated on a single CMOS chip.
Modulation capabilities are provided for phase modulation
and frequency modulation.
Clock rates up to 50 MHz are supported. Frequency accu-
racy can be controlled to one part in 4 billion. Modulation
is effected by loading registers through the parallel micro-
processor interface.
A power-down pin allows external control of a power-down
mode. The part is available in a 48-pin
QFP package.
FUNCTIONAL BLOCK DIAGRAM
RESET
SLEEP
IOUT
COMP
REFIN
FS ADJUST
REFOUT
AGND
AVDD
DGND
DVDD
MCLK
D0
FSELECT
D15
WR
A0
A1
A2
PSEL0
PSEL1
12
AD9830
ON-BOARD
REFERENCE
FULL SCALE
CONTROL
10-BIT DAC
SIN
ROM
PHASE
ACCUMULATOR
(32-BIT)
MUX
FREQ0 REG
FREQ1 REG
PHASE0 REG
PHASE1 REG
PHASE2 REG
PHASE3 REG
PARALLEL REGISTER
TRANSFER CONTROL
MPU INTERFACE
Σ
REV. B
2011
781-461-3113
DIRECT DIGITAL SYNTHESIZER,
WAVEFORM GENERATOR
L
L
Similar DDS products can be found at
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