參數(shù)資料
型號: AD9639BCPZRL-170
廠商: Analog Devices Inc
文件頁數(shù): 20/36頁
文件大?。?/td> 0K
描述: IC ADC 12B 170MSPS QUAD 72LFCSP
標準包裝: 1
位數(shù): 12
采樣率(每秒): 210M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
功率耗散(最大): 1.39W
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 72-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 72-LFCSP
包裝: 標準包裝
輸入數(shù)目和類型: 8 個單端,單極;4 個差分,單極
其它名稱: AD9639BCPZRL-170DKR
Data Sheet
AD9639
Rev. B | Page 27 of 36
Setting Bit 2 in the output mode register (Address 0x14) allows
the user to invert the digital outputs from their nominal state.
This is not to be confused with inverting the serial stream to an
LSB first mode. In default mode, as shown in Figure 2, the MSB
is first in the data output serial stream. However, this order can
be inverted so that the LSB is first in the data output serial stream.
There are eight digital output test pattern options available that
can be initiated through the SPI (see Table 12 for the output bit
sequencing options). This feature is useful when validating
receiver capture and timing. Some test patterns have two serial
sequential words and can be alternated in various ways, depending
on the test pattern selected. Note that some patterns do not
adhere to the data format select option. In addition, custom
user-defined test patterns can be assigned in the user pattern
registers (Address 0x19 through Address 0x20).
The PN sequence short pattern produces a pseudorandom bit
sequence that repeats itself every 29 1 (511) bits. A description
of the PN sequence short and how it is generated can be found
in Section 5.1 of the ITU-T O.150 (05/96) recommendation.
The only difference is that the starting value must be a specific
value instead of all 1s (see Table 11 for the initial values).
The PN sequence long pattern produces a pseudorandom bit
sequence that repeats itself every 223 1 (8,388,607) bits. A
description of the PN sequence long and how it is generated can
be found in Section 5.6 of the ITU-T O.150 (05/96) standard.
The only differences are that the starting value must be a specific
value instead of all 1s (see Table 11 for the initial values) and
that the AD9639 inverts the bit stream with relation to the ITU-T
standard.
Table 11. PN Sequence
Sequence
Initial
Value
First Three Output Samples
(MSB First)
PN Sequence Short
0x0DF
0xDF9, 0x353, 0x301
PN Sequence Long
0x29B80A
0x591, 0xFD7, 0x0A3
Consult the Memory Map section for information on how to
change these additional digital output timing features through
the SPI.
Table 12. Flexible Output Test Modes
Output Test Mode
Bit Sequence
Pattern Name
Digital Output Word 1
Digital Output Word 2
Subject to Data
Format Select
0000
Off (default)
N/A
Yes
0001
Midscale short
1000 0000 0000
Same
Yes
0010
+Full-scale short
1111 1111 1111
Same
Yes
0011
Full-scale short
0000 0000 0000
Same
Yes
0100
Checkerboard
1010 1010 1010
0101 0101 0101
No
0101
PN sequence long1
N/A
Yes
0110
PN sequence short1
N/A
Yes
0111
One-/zero-word toggle
1111 1111 1111
0000 0000 0000
No
1
All test mode options except PN sequence long and PN sequence short can support 8- to 14-bit word lengths to verify data capture to the receiver.
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