參數(shù)資料
型號(hào): AD9639BCPZRL-170
廠商: Analog Devices Inc
文件頁(yè)數(shù): 10/36頁(yè)
文件大?。?/td> 0K
描述: IC ADC 12B 170MSPS QUAD 72LFCSP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
采樣率(每秒): 210M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
功率耗散(最大): 1.39W
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 72-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 72-LFCSP
包裝: 標(biāo)準(zhǔn)包裝
輸入數(shù)目和類型: 8 個(gè)單端,單極;4 個(gè)差分,單極
其它名稱: AD9639BCPZRL-170DKR
AD9639
Data Sheet
Rev. B | Page 18 of 36
For applications where SNR is a key parameter, differential
transformer coupling is the recommended input configuration
to achieve the true performance of the AD9639 (see Figure 38
Regardless of the configuration, the value of the shunt capacitor, C,
is dependent on the input frequency and may need to be reduced
or removed.
*CDIFF IS OPTIONAL
1.25V p-p
33
*CDIFF
C
50Ω
0.1μF
AGND
ADT1-1WT
1:1 Z RATIO
VIN – x
ADC
AD9639
VIN + x
C
0.1F
07973-
013
Figure 38. Differential Transformer-Coupled Configuration
for Baseband Applications
ADC
AD9639
1.25V p-p
2.2pF
0.1μF
ADT1-1WT
1:1 Z RATIO
L
0.1μF
L
33
33
250
65
VIN + x
VIN – x
07973-
014
Figure 39. Differential Transformer-Coupled Configuration
for Wideband IF Applications
ADC
AD9639
1.25V p-p
L
0.1μF
ADT1-1WT
1:1 Z RATIO
0.1μF
33
33
250
VIN + x
VIN – x
07973-
015
Figure 40. Differential Transformer-Coupled Configuration
for Narrow-Band IF Applications
1.25V p-p
33
33
0.1F
66Ω
VIN – x
ADC
AD9639
VIN + x
4.7pF
0.1F
BALUN
1:1 Z
BALUN
1:1 Z
07973-
017
Figure 41. Differential Balun-Coupled Configuration
for Wideband IF Applications
Single-Ended Input Configuration
A single-ended input may provide adequate performance in
cost-sensitive applications. In this configuration, SFDR and
distortion performance can degrade due to input common-mode
swing mismatch. If the application requires a single-ended input
configuration, ensure that the source impedances on each input
are well matched to achieve the best possible performance. A
full-scale input of 1.25 V p-p can be applied to the VIN + x pin
of the AD9639 while the VIN x pin is terminated. Figure 42
shows a typical single-ended input configuration.
1.25V p-p
33
33
49.9Ω
0.1F
25Ω
VIN – x
ADC
AD9639
VIN + x
*CDIFF
C
*CDIFF IS OPTIONAL
C
07973-
016
Figure 42. Single-Ended Input Configuration
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