- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10030 > AD9639BCPZRL-170 (Analog Devices Inc)IC ADC 12B 170MSPS QUAD 72LFCSP PDF資料下載
參數(shù)資料
| 型號(hào)： | AD9639BCPZRL-170 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 13/36頁(yè) |
| 文件大小： | 0K |
| 描述： | IC ADC 12B 170MSPS QUAD 72LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 210M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 功率耗散（最大）： | 1.39W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 72-LFCSP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸入數(shù)目和類型： | 8 個(gè)單端，單極；4 個(gè)差分，單極 |
| 其它名稱： | AD9639BCPZRL-170DKR |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)
AD9639
Data Sheet
Rev. B | Page 20 of 36
Clock Jitter Considerations
High speed, high resolution ADCs are sensitive to the quality of the
clock input. The degradation in SNR at a given input frequency (fA)
due only to aperture jitter (tJ) can be calculated as follows:
SNR Degradation = 20 × log 10(1/2 × π × fA × tJ)
In this equation, the rms aperture jitter represents the root mean
square of all jitter sources, including the clock input, analog input
signal, and ADC aperture jitter. IF undersampling applications
are particularly sensitive to jitter (see Figure 48).
The clock input should be treated as an analog signal in cases
where aperture jitter may affect the dynamic range of the AD9639.
Power supplies for clock drivers should be separated from the
ADC output driver supplies to avoid modulating the clock signal
with digital noise. Low jitter, crystal-controlled oscillators are
the best clock sources. If the clock is generated from another
type of source (by gating, dividing, or another method), it
should be retimed by the original clock during the last step.
Refer to the AN-501 Application Note, the AN-756 Application
Note, and the Analog Dialogue article, “Analog-to-Digital Converter
Clock Optimization: A Test Engineering Perspective” (Volume 42,
Number 2, February 2008) for in-depth information about jitter
performance as it relates to ADCs (visit www.analog.com).
1
10
100
1000
30
40
50
60
70
80
90
100
110
120
130
0.125 ps
0.25 ps
0.5 ps
1.0 ps
2.0 ps
RMS CLOCK JITTER REQUIREMENT
S
NR
(
d
B)
07973-
024
ANALOG INPUT FREQUENCY (MHz)
16 BITS
14 BITS
12 BITS
10 BITS
Figure 48. Ideal SNR vs. Input Frequency and Jitter
Power Dissipation
As shown in Figure 49 and Figure 50, the power dissipated by
the AD9639 is proportional to its clock rate. The digital power
dissipation does not vary significantly because it is determined
primarily by the DRVDD supply and the bias current of the
digital output drivers.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
50
90
70
110
130
150
170
ENCODE (MSPS)
PO
W
ER
(W
)
CURRE
NT
(
mA)
IAVDD
POWER
IDRVDD
07973-
056
Figure 49. Supply Current vs. Encode for fIN = 84.3 MHz, fSAMPLE = 170 MSPS
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
50
90
70
110
130
150
170
190
210
ENCODE (MSPS)
PO
W
ER
(W
)
CURRE
NT
(
mA)
IAVDD
POWER
IDRVDD
07973-
057
Figure 50. Supply Current vs. Encode for fIN = 84.3 MHz, fSAMPLE = 210 MSPS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP332ET-L/TR | IC TXRX RS232/485 SRL 28WSOIC |
| IDT7284L15PAI | IC FIFO 2048X18 15NS 56TSSOP |
| IDT7284L12PA | IC FIFO 2048X18 12NS 56TSSOP |
| ADM5170ANZ | IC TXRX RS232/423 OCTAL 28-DIP |
| VI-26R-MX-F1 | CONVERTER MOD DC/DC 7.5V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9639BCPZRL-210 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Quad 12 Bit 210 MSPS Seria 1.8V ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| AD9640 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter |
| AD9640/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter |
| AD9640-105EBZ | 功能描述:ADC 14BIT 105MSPS DUAL 64-LFCSP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| AD9640-125EBZ | 功能描述:ADC 14BIT 125MSPS DUAL 64-LFCSP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。