參數(shù)資料
型號(hào)： AD9639BCPZRL-170
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 18/36頁(yè)
文件大小： 0K
描述： IC ADC 12B 170MSPS QUAD 72LFCSP
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 12
采樣率（每秒）： 210M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
功率耗散（最大）： 1.39W
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 72-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 72-LFCSP
包裝： 標(biāo)準(zhǔn)包裝
輸入數(shù)目和類(lèi)型： 8 個(gè)單端，單極；4 個(gè)差分，單極
其它名稱(chēng)： AD9639BCPZRL-170DKR
Data Sheet
AD9639
Rev. B | Page 25 of 36
Digital Outputs and Timing
The AD9639 has differential digital outputs that power up
by default. The driver current is derived on chip and sets the
output current at each output equal to a nominal 4 mA. Each
output presents a 100 Ω dynamic internal termination to reduce
unwanted reflections.
A 100 Ω differential termination resistor should be placed at
each receiver input to result in a nominal 400 mV peak-to-peak
swing at the receiver. Alternatively, single-ended 50 Ω termina-
tion can be used. When single-ended termination is used, the
termination voltage should be DRVDD/2; otherwise, ac coupling
capacitors can be used to terminate to any single-ended voltage.
The AD9639 digital outputs can interface with custom ASICs
and FPGA receivers, providing superior switching performance
in noisy environments. Single point-to-point network topologies
are recommended with a single differential 100 Ω termination
resistor placed as close to the receiver logic as possible. The
common mode of the digital output automatically biases itself
to half the supply of DRVDD if dc-coupled connecting is used.
For receiver logic that is not within the bounds of the DRVDD
supply, an ac-coupled connection should be used. Simply place
a 0.1 μF capacitor on each output pin and derive a 100 Ω
differential termination close to the receiver side.
If there is no far-end receiver termination or if there is poor
differential trace routing, timing errors may result. To avoid
such timing errors, it is recommended that the trace length be
less than 6 inches and that the differential output traces be close
together and at equal lengths.
100
DIFFERENTIAL
TRACE PAIR
DOUT + x
DRVDD
DOUT – x
VCM = DRVDD/2
OUTPUT SWING = 400mV p-p
RECEIVER
07
97
3-
09
2
Figure 57. DC-Coupled Digital Output Termination Example
100
OR
100
DIFFERENTIAL
TRACE PAIR
DOUT + x
DRVDD
VRXCM
DOUT – x
VCM = Rx VCM
OUTPUT SWING = 400mV p-p
0.1F
RECEIVER
07
97
3-
09
3
Figure 58. AC-Coupled Digital Output Termination Example
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