參數(shù)資料
型號(hào)： AD9524BCPZ
廠商： Analog Devices Inc
文件頁數(shù)： 53/56頁
文件大小： 0K
描述： IC INTEGER-N CLCK GEN 48LFCSP
標(biāo)準(zhǔn)包裝： 1
類型： 時(shí)鐘/頻率發(fā)生器，扇出緩沖器（分配）
PLL： 是
主要目的： 以太網(wǎng)，光纖通道，SONET/SDH
輸入： CMOS
輸出： HSTL，LVCMOS，LVDS，LVPECL
電路數(shù)： 1
比率 - 輸入:輸出： 2:6
差分 - 輸入:輸出： 是/是
頻率 - 最大： 1GHz
電源電壓： 1.71 V ~ 3.465 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 48-LFCSP-VQ（7x7）
包裝： 托盤
相關(guān)產(chǎn)品： AD9524BCPZ-REEL7DKR-ND - IC INTEGER-N CLCK GEN 48LFCSP
AD9524BCPZ-REEL7CT-ND - IC INTEGER-N CLCK GEN 48LFCSP
AD9524/PCBZ-ND - BOARD EVAL FOR AD9524
AD9524BCPZ-REEL7TR-ND - IC INTEGER-N CLCK GEN 48LFCSP
AD9524
Data Sheet
Rev. E | Page 6 of 56
POWER DISSIPATION
Table 3.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
POWER DISSIPATION
Typical Configuration
559
593
mW
Clock distribution outputs running as follows: four LVPECL outputs
at 122.88 MHz, two LVDS outputs (3.5 mA) at 122.88 MHz,
one differential input reference at 30.72 MHz; fVCXO = 122.88 MHz,
fVCO = 3932.16 MHz; PLL2 BW = 530 kHz; doubler is off
PD, Power-Down
101
132.2
mW
PD pin pulled low, with typical configuration conditions
INCREMENTAL POWER DISSIPATION
Low Power Typical Configuration
389
450.4
mW
Absolute total power with clock distribution; one LVPECL output
running at 122.88 MHz; one differential input reference at
30.72 MHz; fVCXO = 122.88 MHz, fVCO = 3932.16 MHz; doubler is off
Switched to One Input,
Reference Single-Ended Mode
28.5
8
mW
Running at 30.72 MHz
Switched to Two Inputs,
Reference Differential Mode
26
44.6
mW
Running at 30.72 MHz
Switched to Two Inputs,
Reference Single-Ended Mode
27.5
5.1
mW
Running at 30.72 MHz
Output Distribution, Driver On
Incremental power increase (OUT1) from low power typical (3.3 V)
LVDS
15.3
18.4
mW
Single 3.5 mA LVDS output at 245.76 MHz
47.8
55.4
mW
Single 7 mA LVDS output at 61.44 MHz
LVPECL Compatible
50.1
54.9
mW
Single LVPECL output at 122.88 MHz
HSTL
40.2
46.3
mW
Single 8 mA HSTL output at 122.88 MHz
43.7
50.3
mW
Single 16 mA HSTL output at 122.88 MHz
CMOS
6.6
7.9
mW
Single 3.3 V CMOS output at 15.36 MHz
9.9
11.9
mW
Dual complementary 3.3 V CMOS output at 15.36 MHz
9.9
11.9
mW
Dual in-phase 3.3 V CMOS output at 15.36 MHz
REFA, REFA, REFB, REFB, OSC_IN, OSC_IN, AND ZD_IN, ZD_IN INPUT CHARACTERISTICS
Table 4.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DIFFERENTIAL MODE
Input Frequency Range
400
MHz
Input Slew Rate (OSC_IN)
400
V/s
Minimum limit imposed for jitter performance
Common-Mode Internally
Generated Input Voltage
0.6
0.7
0.8
V
Input Common-Mode Range
1.025
1.475
V
For dc-coupled LVDS (maximum swing)
Differential Input Voltage,
Sensitivity Frequency < 250 MHz
100
mV p-p
Capacitive coupling required; can accommodate single-ended
input by ac grounding of unused input; the instantaneous voltage
on either pin must not exceed the 1.8 V dc supply rails
Differential Input Voltage,
Sensitivity Frequency > 250 MHz
200
mV p-p
Capacitive coupling required; can accommodate single-ended
input by ac grounding of unused input; the instantaneous voltage
on either pin must not exceed the 1.8 V dc supply rails
Differential Input Resistance
4.8
k
Differential Input Capacitance
1
pF
Duty Cycle
Duty cycle bounds are set by pulse width high and pulse width low
Pulse Width Low
1
ns
Pulse Width High
1
ns
CMOS MODE SINGLE-ENDED INPUT
Input Frequency Range
250
MHz
Input High Voltage
1.6
V
Input Low Voltage
0.52
V
Input Threshold Voltage
1.0
V
When ac coupling to the input receiver, the user must dc bias the
input to 1 V; the single-ended CMOS input is 3.3 V compatible
相關(guān)PDF資料
PDF描述
AD9540BCPZ-REEL7 IC CLOCK GEN/SYNTHESIZER 48LFCSP
AD9547BCPZ-REEL7 IC CLOCK GEN/SYNCHRONIZR 64LFCSP
AD9548BCPZ-REEL7 IC CLOCK GEN/SYNCHRONIZR 88LFCSP
AD9549ABCPZ-REEL7 IC CLOCK GEN/SYNCHRONIZR 64LFCSP
AD9550BCPZ-REEL7 IC INTEGER-N TRANSLATOR 32-LFCSP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9524BCPZ-REEL7 功能描述:IC INTEGER-N CLCK GEN 48LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件
AD9525 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Jitter Clock Generator with Eight LVPECL Outputs
AD9525/PCBZ 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 Evaluation kit 2950MHz VCO installed RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
AD9525/PCBZ-VCO 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 Evaluation kit CRO29508 VCO installed RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
AD9525BCPZ 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 High performance clock distributor Exter RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*