參數(shù)資料
型號(hào): AD9518-4ABCPZ
廠商: Analog Devices Inc
文件頁數(shù): 40/64頁
文件大?。?/td> 0K
描述: IC CLOCK GEN 6CH 1.8GHZ 48LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: 時(shí)鐘發(fā)生器,扇出配送
PLL:
輸入: CMOS,LVDS,LVPECL
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:6
差分 - 輸入:輸出: 是/是
頻率 - 最大: 1.8GHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 托盤
Data Sheet
AD9518-4
Rev. B | Page 45 of 64
CONTROL REGISTERS
CONTROL REGISTER MAP OVERVIEW
Table 42. Control Register Map Overview
Reg.
Addr.
(Hex)
Parameter
Bit 7 (MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
Default
Value
(Hex)
Serial Port Configuration
0x000
Serial port
configuration
SDO
active
LSB first
Soft reset
Long
instruction
Long
instruction
Soft reset
LSB first
SDO active
0x18
0x001
Blank
0x002
Reserved
0x003
Part ID
Part ID (read only)
0xE3
0x004
Readback
control
Blank
Read back
active
registers
0x00
PLL
0x010
PFD and
charge pump
PFD
polarity
Charge pump current
Charge pump mode
PLL power-down
0x7D
0x011
R counter
14-bit R divider, Bits[7:0] (LSB)
0x01
0x012
Blank
14-bit R divider, Bits[13:8] (MSB)
0x00
0x013
A counter
Blank
6-bit A counter
0x00
0x014
B counter
13-bit B counter, Bits[7:0] (LSB)
0x03
0x015
Blank
13-bit B counter, Bits[12:8] (MSB)
0x00
0x016
PLL Control 1
Set CP pin
to VCP/2
Reset R
counter
Reset A and
B counters
Reset all
counters
B counter
bypass
Prescaler P
0x06
0x017
PLL Control 2
STATUS pin control
Antibacklash pulse width
0x00
0x018
PLL Control 3
Reserved
Lock detect counter
Digital lock
detect
window
Disable
digital lock
detect
VCO calibration divider
VCO cal now
0x06
0x019
PLL Control 4
R, A, B counters
SYNC pin reset
R path delay
N path delay
0x00
0x01A
PLL Control 5
Reserved
Reference
frequency
monitor
threshold
LD pin control
0x00
0x01B
PLL Control 6
VCO
frequency
monitor
REF2
(REFIN)
frequency
monitor
REF1 (REFIN)
frequency
monitor
REFMON pin control
0x00
0x01C
PLL Control 7
Disable
switchover
deglitch
Select
REF2
Use
REF_SEL pin
Reserved
REF2
power-on
REF1
power-on
Differential
reference
0x00
0x01D
PLL Control 8
Reserved
PLL status
register
disable
LD pin
comparator
enable
Holdover
enable
External
holdover
control
Holdover
enable
0x00
0x01E
PLL Control 9
Reserved
0x00
0x01F
PLL readback
Reserved
VCO cal
finished
Holdover
active
REF2
selected
VCO
frequency >
threshold
REF2
frequency >
threshold
REF1
frequency >
threshold
Digital
lock detect
N/A
0x020
to
0x04F
Blank
0x0A0
to
0x0AB
Reserved
0x0AC
to
0x0EF
Blank
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