參數(shù)資料
型號： AD9517-4ABCPZ-RL7
廠商： Analog Devices Inc
文件頁數(shù)： 54/80頁
文件大?。?/td> 0K
描述： IC CLOCK GEN 1.8GHZ VCO 48LFCSP
設(shè)計資源： High Performance, Dual Channel IF Sampling Receiver (CN0140)
標(biāo)準(zhǔn)包裝： 750
類型： 時鐘發(fā)生器，扇出配送
PLL： 是
輸入： CMOS，LVDS，LVPECL
輸出： CMOS，LVDS，LVPECL
電路數(shù)： 1
比率 - 輸入:輸出： 1:12
差分 - 輸入:輸出： 是/是
頻率 - 最大： 1.8GHz
除法器/乘法器： 是/無
電源電壓： 3.135 V ~ 3.465 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 48-LFCSP-VQ（7x7）
包裝： 帶卷 (TR)
AD9517-4
Data Sheet
Rev. E | Page 58 of 80
Reg.
Addr.
(Hex)
Parameter
Bit 7 (MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
Default
Value
(Hex)
LVPECL Channel Dividers
0x190
Divider 0
(PECL)
Divider 0 low cycles
Divider 0 high cycles
0x00
0x191
Divider 0
bypass
Divider 0
nosync
Divider 0
force high
Divider 0
start high
Divider 0 phase offset
0x80
0x192
Blank
Reserved
Divider 0
direct to
output
Divider 0
DCCOFF
0x00
0x193
to
0x195
Reserved
0x196
Divider1
(PECL)
Divider 1 low cycles
Divider 1 high cycles
0x00
0x197
Divider 1
bypass
Divider 1
nosync
Divider 1
force high
Divider 1
start high
Divider 1 phase offset
0x00
0x198
Blank
Reserved
Divider 1
direct to
output
Divider 1
DCCOFF
0x00
LVDS/CMOS Channel Dividers
0x199
Divider 2
(LVDS/CMOS)
Low Cycles Divider 2.1
High Cycles Divider 2.1
0x22
0x19A
Phase Offset Divider 2.2
Phase Offset Divider 2.1
0x00
0x19B
Low Cycles Divider 2.2
High Cycles Divider 2.2
0x11
0x19C
Reserved
Bypass
Divider 2.2
Bypass
Divider 2.1
Divider 2
nosync
Divider 2
force high
Start High
Divider 2.2
Start High
Divider 2.1
0x00
0x19D
Blank
Reserved
Divider 2
DCCOFF
0x00
0x19E
Divider 3
(LVDS/CMOS)
Low Cycles Divider 3.1
High Cycles Divider 3.1
0x22
0x19F
Phase Offset Divider 3.2
Phase Offset Divider 3.1
0x00
0x1A0
Low Cycles Divider 3.2
High Cycles Divider 3.2
0x11
0x1A1
Reserved
Bypass
Divider 3.2
Bypass
Divider 3.1
Divider 3
nosync
Divider 3
force high
Start High
Divider 3.2
Start High
Divider 3.1
0x00
0x1A2
Blank
Reserved
Divider 3
DCCOFF
0x00
0x1A3
Reserved
0x1A4
to
0x1DF
Blank
VCO Divider and CLK Input
0x1E0
VCO divider
Blank
Reserved
VCO Divider
0x02
0x1E1
Input CLKs
Reserved
Power
down
clock input
section
Power down
VCO clock
interface
Power
down VCO
and CLK
Select
VCO or CLK
Bypass VCO
divider
0x00
0x1E2
to
0x22A
Blank
System
0x230
Power-down
and sync
Reserved
Power
down sync
Power
down
distribution
reference
Soft sync
0x00
0x231
Blank
Reserved
0x00
Update All Registers
0x232
Update all
registers
Blank
Update all
registers (self-
clearing bit)
0x00
相關(guān)PDF資料
PDF描述
AD9518-0ABCPZ IC CLOCK GEN 6CH 2.8GHZ 48LFCSP
AD9518-1ABCPZ IC CLOCK GEN 6CH 2GHZ 48LFCSP
AD9518-2ABCPZ-RL7 IC CLOCK GEN 6CH 2.2GHZ 48LFCSP
AD9518-3ABCPZ IC CLOCK GEN 6CH 2GHZ 48LFCSP
AD9518-4ABCPZ-RL7 IC CLOCK GEN 6CH 1.8GHZ 48LFCSP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9517-4APCBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Output Clock Generator with Integrated 1.6 GHz VCO
AD9517-4BCPZ 制造商:Analog Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:IC CLOCK GENERATOR 1.8GHZ LFCSP-48 制造商:Analog Devices 功能描述:IC, CLOCK GENERATOR, 1.8GHZ, LFCSP-48, Clock IC Type:Clock Generator, Frequency:
AD9517-4BCPZ-REEL7 制造商:Analog Devices 功能描述:
AD9518-0 制造商:AD 制造商全稱:Analog Devices 功能描述:6-Output Clock Generator
AD9518-0/PCBZ 制造商:Analog Devices 功能描述:Evaluation Kit For 6-Output Clock Generator With Integrated 2.8 GHZ VCO
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*