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參數(shù)資料
| 型號： | AD9432BSVZ-80 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 80MSPS 52TQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 80M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 1W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 52-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 52-TQFP-EP（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個差分，單極 |
AD9432
Rev. F | Page 4 of 16
Parameter
Temp
Test
80 MSPS
105 MSPS
Level
Min
Typ
Max
Min
Typ
Max
Unit
POWER SUPPLY
Power Dissipation3
Full
VI
790
1000
850
1100
mW
IVCC
Full
VI
158
200
170
220
mA
IVDD
Full
VI
9.5
12.2
12.5
16
mA
Power Supply Rejection Ratio
(PSRR)
25°C
I
5
+0.5
+5
5
+0.5
+5
mV/V
DYNAMIC PERFORMANCE4
Signal-to-Noise Ratio (SNR)
(Without Harmonics)
fIN = 10 MHz
25°C
I
65.5
67.5
65.5
67.5
dB
fIN = 40 MHz
25°C
I
65
67.2
dB
fIN = 49 MHz
25°C
I
67.0
64
67.0
dB
fIN = 70 MHz
25°C
V
66.1
dB
Signal-to-Noise and Distortion
(SINAD) Ratio (with Harmonics)
fIN = 10 MHz
25°C
I
65
67.2
65
67.2
dB
fIN = 40 MHz
25°C
I
64.5
66.9
dB
fIN = 49 MHz
25°C
I
66.7
63
66.7
dB
fIN = 70 MHz
25°C
V
65.8
dB
Effective Number of Bits (ENOB)
fIN = 10 MHz
25°C
V
11.0
Bits
fIN = 40 MHz
25°C
V
10.9
Bits
fIN = 49 MHz
25°C
V
10.9
Bits
fIN = 70 MHz
25°C
V
10.7
Bits
Second-Order and Third-Order
Harmonic Distortion
fIN = 10 MHz
25°C
I
75
85
75
85
dBc
fIN = 40 MHz
25°C
I
73
85
83
dBc
fIN = 49 MHz
25°C
I
83
72
80
dBc
fIN = 70 MHz
25°C
V
80
78
dBc
Worst Other Harmonic or Spur
(Excluding Second-Order and
Third-Order Harmonics)
fIN = 10 MHz
25°C
I
80
90
80
90
dBc
fIN = 40 MHz
25°C
I
80
90
dBc
fIN = 49 MHz
25°C
I
90
80
90
dBc
fIN = 70 MHz
25°C
V
90
dBc
Two-Tone Intermodulation
Distortion (IMD)
fIN1 = 29.3 MHz; fIN2 = 30.3 MHz
25°C
V
75
dBc
fIN1 = 70.3 MHz; fIN2 = 71.3 MHz
25°C
V
66
dBc
1 Gain error and gain temperature coefficients are based on the ADC only (with a fixed 2.5 V external reference and a 2 V p-p differential analog input).
2 tV and tPD are measured from the transition points of the ENCODE input to the 50%/50% levels of the digital output swing. The digital output load during testing is not
to exceed an ac load of 10 pF or a dc current of ±40 μA. Rise and fall times are measured from 10% to 90%.
3 Power dissipation measured with encode at rated speed and a dc analog input (outputs static, IVDD = 0).
4 SNR/harmonics based on an analog input voltage of –0.5 dBFS referenced to a 2 V full-scale input range.
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