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參數(shù)資料
型號: AD9246BCPZRL7-105
廠商: Analog Devices Inc
文件頁數(shù): 9/44頁
文件大?。?/td> 0K
描述: IC ADC 14BIT 105MSPS 48-LFCSP
設(shè)計資源: Using AD8376 to Drive Wide Bandwidth ADCs for High IF AC-Coupled Appls (CN0002)
Driving AD9233/46/54 ADCs in AC-Coupled Baseband Appls (CN0051)
標(biāo)準(zhǔn)包裝: 750
位數(shù): 14
采樣率(每秒): 105M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 3
功率耗散(最大): 350mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個單端,單極;1 個差分,單極
AD9246
Rev. A | Page 17 of 44
AD9246
R
0.1F
2V p-p
VIN+
VIN–
CML
C
R
0.1F
S
0.1F
0
549
1-
0
80
25
S
PA
P
Figure 40. Differential Double Balun Input Configuration
AD9246
AD8352
0
R
0
CD
RD
RG
0.1F
VIN+
VIN–
CML
C
0.1F
16
1
2
3
4
5
11
R
0.1F
10
8, 13
14
VCC
200
054
91
-0
81
ANALOG INPUT
Figure 41. Differential Input Configuration Using the AD8352
Table 9. Reference Configuration Summary
Selected Mode
SENSE Voltage
Resulting VREF (V)
Resulting Differential
Span (V p-p)
External Reference
AVDD
N/A
2 × External Reference
Internal Fixed Reference
VREF
0.5
1.0
Programmable Reference
0.2 V to VREF
+
×
R1
R2
1
5
.
0
(see Figure 43)
2 × VREF
Internal Fixed Reference
AGND to 0.2 V
1.0
2.0
VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD9246.
The input range is adjustable by varying the reference voltage
applied to the AD9246, using either the internal reference or an
externally applied reference voltage. The input span of the ADC
tracks reference voltage changes linearly. The various reference
modes are summarized in the following sections. The Reference
Decoupling section describes the best practices and require-
ments for PCB layout of the reference.
Internal Reference Connection
A comparator within the AD9246 detects the potential at the
SENSE pin and configures the reference into four possible
states, as summarized in Table 9. If SENSE is grounded, the
reference amplifier switch is connected to the internal resistor
divider (see Figure 42), setting VREF to 1 V.
Connecting the SENSE pin to VREF switches the reference
amplifier input to the SENSE pin, completing the loop and
providing a 0.5 V reference output.
If a resistor divider is connected external to the chip as shown
in Figure 43, the switch sets to the SENSE pin. This puts the
reference amplifier in a noninverting mode with the VREF
output defined as
+
=
R1
R2
VREF
1
5
.
0
If the SENSE pin is connected to AVDD, the reference amplifier
is disabled, and an external reference voltage can be applied to
the VREF pin (see the External Reference Operation section).
The input range of the ADC always equals twice the voltage at
the reference pin for either an internal or an external reference.
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