
AD8137
Rev. B | Page 22 of 24
This example shows that when R
F
and R
G
are large compared
to R
T
, the gain reduction produced by the increase in R
G
is
essentially cancelled by the increase in the Thevenin voltage
caused by R
T
being greater than the output resistance of the
signal source. In general, as R
F
and R
G
become smaller in termi-
nated applications, R
F
needs to be increased to compensate for
the increase in R
G
.
When generating the typical performance characteristics data,
the measurements were calibrated to take the effects of the
terminations on closed-loop gain into account.
AD8137
+
–
8
2
1
6
3
4
0V
2V p-p
R
52.3
5
+
–
V
OCM
1k
1.02k
1k
1k
0.1
μ
F
0.1
μ
F
+5V
–5V
V
IN
SIGNAL
SOURCE
50
0
Power Down
The AD8137 features a PD pin that can be used to minimize the
quiescent current consumed when the device is not being used.
PD is asserted by applying a low logic level to Pin 7. The thresh-
old between high and low logic levels is nominally 1.1 V above
the negative supply rail. See the Specification tables (Table 1 to
Table 3) for the threshold limits.
Figure 66. AD8137 with Terminated Input
The 52.3 termination resistor, R
T
, in parallel with the 1 k
input resistance of the AD8137 circuit, yields an overall input
resistance of 50 that is seen by the signal source. In order to
have matched feedback loops, each loop must have the same R
G
if it has the same R
F
. In the input (upper) loop, R
G
is equal to the
1 k resistor in series with the (+) input plus the parallel
combination of R
T
and the source resistance of 50 . In the
upper loop, R
G
is therefore equal to 1.03 k. The closest
standard value is 1.02 k and is used for R
G
in the lower loop.
DRIVING AN ADC WITH GREATER THAN 12-BIT
PERFORMANCE
Since the AD8137 is suitable for 12-bit systems, it is desirable to
measure the performance of the amplifier in a system with
greater than 12-bit linearity. In particular, the effective number
of bits, ENOB, is most interesting. The AD7687, 16-bit,
250 KSPS ADC’s performance makes it an ideal candidate for
showcasing the 12-bit performance of the AD8137.
Things become more complicated when it comes to
determining the feedback resistor values. The amplitude of the
signal source generator V
IN
is two times the amplitude of its
output signal when terminated in 50 . Therefore, a 2 V p-p
terminated amplitude is produced by a 4 V p-p amplitude from
V
S
. The Thevenin equivalent circuit of the signal source and R
T
must be used when calculating the closed-loop gain because R
G
in the upper loop is split between the 1 k resistor and the
Thevenin resistance looking back toward the source. The
Thevenin voltage of the signal source is greater than the signal
source output voltage when terminated in 50 because R
T
must always be greater than 50 . In this case, R
T
is 52.3 and
the Thevenin voltage and resistance are 2.04 V p-p and 25.6 ,
respectively.
For this application, the AD8137 is set in a gain of two and
driven single-ended through a 20 kHz band-pass filter, while the
output is taken differentially to the input of the AD7687
(see Figure 67). This circuit has mismatched R
G
impedances and,
therefore, has a dc offset at the differential output. It is included
as a test circuit to illustrate the performance of the AD8137.
Actual application circuits should have matched feedback
networks.
For an AD7687 input range up to 1.82 dBFS, the AD8137 power
supply is a single 5 V applied to V
S+
with V
S
tied to ground. To
increase the AD7687 input range to 0.45 dBFS, the AD8137
supplies are increased to +6 V and 1 V. In both cases, the V
OCM
pin is biased with 2.5 V and the PD pin is left floating. All voltage
supplies are decoupled with 0.1 μF capacitors. Figure 68 and
Figure 69 show the performance of the 1.82 dBFS setup and the
0.45 dBFS setup, respectively.
Now the upper input branch can be viewed as a 2.04 V p-p
source in series with 1.03 k. Since this is to be a unity-gain
application, a 2 V p-p differential output is required, and R
F
must therefore be 1.03 k × (2/2.04) = 1.01 k ≈ 1 k.