參數(shù)資料
型號: AD8137_05
廠商: Analog Devices, Inc.
英文描述: Low Cost, Low Power 12-Bit Differential ADC Driver
中文描述: 低成本,低功耗12位差分ADC驅(qū)動器
文件頁數(shù): 20/24頁
文件大小: 597K
代理商: AD8137_05
AD8137
Rev. B | Page 20 of 24
0
GND
V
REF
V
REFA
ADR525A
2.5V SHUNT
REFERENCE
AD7450A
V
IN
+
V
IN
VDD
AD8137
+
8
V
REFB
2.5V
2
1
6
3
4
5
V
OCM
1k
1k
1k
2.5k
1k
5V
50
50
V
IN
1.0nF
1.0nF
0.1
μ
F
0.1
μ
F
+1.88V
+1.25V
+0.63V
V
ACM WITH
V
REFB
+2.5V
GND
–2.5V
Figure 64. AD8137 Driving AD7450A, 12-Bit A/D Converter
The input impedance of a conventional inverting op amp
configuration is simply R
G
, but is higher in Equation 19
because a fraction of the differential output voltage appears at
the summing junctions, V
AN
and V
AP
. This voltage partially
bootstraps the voltage across the input resistor R
G
, leading to
the increased input resistance.
Input Common-Mode Swing Considerations
In some single-ended-to-differential applications when using a
single-supply voltage, attention must be paid to the swing of the
input common-mode voltage, V
ACM
.
Consider the case in Figure 64, where V
IN
is 5 V p-p swinging
about a baseline at ground and V
REFB
is connected to ground.
The input signal to the AD8137 is originating from a source
with a very low output resistance.
The circuit has a differential gain of 1.0 and β = 0.5. V
ICM
has an
amplitude of 2.5 V p-p and is swinging about ground. Using the
results in Equation 16, the common-mode voltage at the AD8137’s
inputs, V
ACM
, is a 1.25 V p-p signal swinging about a baseline of
1.25 V The maximum negative excursion of V
ACM
in this case is
0.63 V which exceeds the lower input common-mode voltage limit.
One way to avoid the input common-mode swing limitation is
to bias V
IN
and V
REF
at midsupply. In this case, V
IN
is 5 V p-p
swinging about a baseline at 2.5 V, and V
REF
is connected to a
low-Z 2.5 V source. V
ICM
now has an amplitude of 2.5 V p-p and
is swinging about 2.5 V. Using the results in Equation 17, V
ACM
is calculated to be equal to V
ICM
because
V
OCM
= V
ICM
.
Therefore,
V
ICM
swings from 1.25 V to 3.75 V, which is well within the
input common-mode voltage limits of the AD8137. Another
benefit seen by this example is that since V
OCM
= V
ACM
= V
ICM
,
no wasted common-mode current flows. Figure 65 illustrates a
way to provide the low-Z bias voltage. For situations that do not
require a precise reference, a simple voltage divider will suffice
to develop the input voltage to the buffer.
0
V
IN
0V TO 5V
AD8137
+
8
2
1
6
3
4
5
V
OCM
1k
1k
5V
1k
1k
10k
0.1
μ
F
0.1
μ
F
0.1
μ
F
10
μ
F
+
AD8031
+
0.1
μ
F
5V
ADR525A
2.5V SHUNT
REFERENCE
TO
AD7450A
V
REF
Figure 65. Low-Z Bias Source
Another way to avoid the input common-mode swing limita-
tion is to use dual power supplies on the AD8137. In this case,
the biasing circuitry is not required.
Bandwidth vs. Closed-Loop Gain
The AD8137’s 3 dB bandwidth will decrease proportionally to
increasing closed-loop gain in the same way as a traditional
voltage feedback operational amplifier. For closed-loop gains
greater than 4, the bandwidth obtained for a specific gain can be
estimated as
)
(
R
R
R
V
f
F
G
G
dm
O,
dB
MHz
72
3
×
+
=
(20)
or equivalently, β(72 MHz).
This estimate assumes a minimum 90 ° phase margin for the
amplifier loop, a condition approached for gains greater than
four. Lower gains will show more bandwidth than predicted by
the equation due to the peaking produced by the lower phase
margin.
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