參數(shù)資料
型號(hào)： AD7731BRZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 15/44頁(yè)
文件大?。?/td> 0K
描述： IC ADC 24BIT SIGMA-DELTA 24-SOIC
標(biāo)準(zhǔn)包裝： 400
位數(shù)： 24
采樣率（每秒）： 6.4k
數(shù)據(jù)接口： DSP，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 125mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 24-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 24-SOIC W
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 3 個(gè)差分，單極；3 個(gè)差分，雙極；5 個(gè)偽差分，單極；5 個(gè)偽差分，雙極
配用： EVAL-AD7731EBZ-ND - BOARD EVALUATION FOR AD7731
AD7731
–22–
REV. 0
CIRCUIT DESCRIPTION
The AD7731 is a sigma-delta A/D converter with on-chip digital
filtering, intended for the measurement of wide dynamic range,
low-frequency signals such as those in strain-gage, pressure
transducer, temperature measurement, industrial control or pro-
cess control applications. It contains a sigma-delta (or charge-
balancing) ADC, a calibration microcontroller with on-chip
static RAM, a clock oscillator, a digital filter and a bidirectional
serial communications port. The part consumes 13.5 mA of
power supply current with a standby mode which consumes
only 20
A. The part operates from a single +5 V supply. The
clock source for the part can be provided via an external clock
or by connecting a crystal oscillator or ceramic resonator across
the MCLK IN or MCLK OUT pins.
The part contains three programmable-gain fully differential
analog input channels which can be reconfigured as five pseudo-
differential inputs. The part handles a total of seven different
input ranges on all channels which are programmed via the on-
chip registers. The differential unipolar ranges are: 0 mV to
+20 mV through 0 V to +1.28 V and the differential bipolar
ranges are:
±20 mV through ±1.28 V.
The AD7731 employs a sigma-delta conversion technique to
realize up to 24 bits of no missing codes performance. The
sigma-delta modulator converts the sampled input signal into a
digital pulse train whose duty cycle contains the digital informa-
tion. A digital low-pass filter processes the output of the sigma-
delta modulator and updates the data register at a rate that can
be programmed over the serial interface. The output data from
the part is accessed over this serial interface. The cutoff fre-
quency and output rate of this filter can be programmed via on-
chip registers. The output noise performance and peak-to-peak
resolution of the part varies with gain and with the output rate
as shown in Tables I to IV.
The analog inputs are buffered on-chip, allowing the part to
handle significant source impedances on the analog input. This
means that external R, C filtering (for noise rejection or RFI
interference reduction) can be placed on the analog inputs if
required. The common-mode voltage range for the analog in-
puts comes within 1.2 V of AGND and 0.95 V of AVDD. The
reference input is also differential and the common-mode range
here is from AGND to AVDD.
The AD7731 contains a number of hardware and software
events that set or reset status flags and bits in registers. Table
XVII summarizes which blocks and flags are affected by the
different events.
Table XVII. Reset Events
Set Registers
Mode
Filter
Analog
Reset Serial
Set
RDY
Set
STDY
Event
to Default
Bits
Reset
Power-Down
Interface
Pin/Bit
Bit
Power-On Reset
Yes
000
Yes
RESET Pin
Yes
000
Yes
No
Yes
STANDBY Pin
No
As Is
Yes
No
Yes
Mode 011 Write
No
011
Yes
No
Yes
SYNC Pin
No
As Is
Yes
No
Yes
Mode 000 Write
No
000
Yes
No
Yes
Conversion or
No
New
Initial
No
Yes
Cal Mode Write
Value
Reset
Clock 32 1s
No
As Is
No
Yes
Data Register Read
No
As Is
No
Yes
No
REV. A
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