AD7671–SPECIFICATIONS (–40 C to +85 C,AVDD=DVDD=5V,OVDD=2.7 V to 5.25 V, unless otherwise noted.) P" />
參數(shù)資料
型號: AD7671ASTZRL
廠商: Analog Devices Inc
文件頁數(shù): 12/24頁
文件大小: 0K
描述: IC ADC 16BIT CMOS 1MSPS 48LQFP
標準包裝: 2,000
系列: PulSAR®
位數(shù): 16
采樣率(每秒): 1M
數(shù)據(jù)接口: 串行,并聯(lián)
轉換器數(shù)目: 1
功率耗散(最大): 125mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個單端,單極;4 個單端,雙極
配用: EVAL-AD7671CBZ-ND - BOARD EVALUATION FOR AD7671
–2–
AD7671–SPECIFICATIONS (–40 C to +85 C,AVDD=DVDD=5V,OVDD=2.7 V to 5.25 V, unless otherwise noted.)
Parameter
Conditions
Min
Typ
Max
Unit
RESOLUTION
16
Bits
ANALOG INPUT
Voltage Range
VIND – VINGND
±4 REF, 0 V to 4 REF, ±2 REF (See Table I)
Common-Mode Input Voltage
VINGND
–0.1
+0.5
V
Analog Input CMRR
fIN = 100 kHz
74
dB
Input Impedance
See Table I
THROUGHPUT SPEED
Complete Cycle
In Warp Mode
1
ms
Throughput Rate
In Warp Mode
1
1000
kSPS
Time between Conversions
In Warp Mode
1
ms
Complete Cycle
In Normal Mode
1.25
ms
Throughput Rate
In Normal Mode
0
800
kSPS
Complete Cycle
In Impulse Mode
1.5
ms
Throughput Rate
In Impulse Mode
0
666
kSPS
DC ACCURACY
Integral Linearity Error
–2.5
+2.5
LSB
1
No Missing Codes
16
Bits
Transition Noise
0.7
LSB
Bipolar Zero Error
2, T
MIN to TMAX
±5 V Range, Normal or
–45
+45
LSB
Impulse Modes
Other Range or Mode
–0.1
+0.1
% of FSR
Bipolar Full-Scale Error
2, T
MIN to TMAX
–0.38
+0.38
% of FSR
Unipolar Zero Error
2, T
MIN to TMAX
–0.18
+0.18
% of FSR
Unipolar Full-Scale Error
2, T
MIN to TMAX
–0.76
+0.76
% of FSR
Power Supply Sensitivity
AVDD = 5 V
±5%
±9.5
LSB
AC ACCURACY
Signal-to-Noise
fIN = 20 kHz
89
90
dB
3
fIN = 250 kHz
90
dB
Spurious-Free Dynamic Range
fIN = 250 kHz
100
dB
Total Harmonic Distortion
fIN = 20 kHz
–100
–96
dB
fIN = 250 kHz
–100
dB
Signal-to-(Noise+Distortion)
fIN = 20 kHz
88.5
90
dB
fIN = 250 kHz, –60 dB Input
30
dB
–3 dB Input Bandwidth
9.6
MHz
SAMPLING DYNAMICS
Aperture Delay
2ns
Aperture Jitter
5
ps rms
Transient Response
Full-Scale Step
250
ns
REFERENCE
External Reference Voltage Range
2.3
2.5
AVDD – 1.85
V
External Reference Current Drain
1 MSPS Throughput
200
mA
DIGITAL INPUTS
Logic Levels
VIL
–0.3
+0.8
V
VIH
+2.0
DVDD + 0.3
V
IIL
–1+1
mA
IIH
–1+1
mA
DIGITAL OUTPUTS
Data Format
Parallel or Serial 16-Bit
Pipeline Delay
Conversion Results Available Immediately
after Completed Conversion
VOL
ISINK = 1.6 mA
0.4
V
VOH
ISOURCE = –570
mA
OVDD – 0.6
V
REV. C
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