參數(shù)資料
型號(hào)： AD7352YRUZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 6/21頁(yè)
文件大?。?/td> 0K
描述： IC ADC DUAL 12BIT 3MSPS 16TSSOP
設(shè)計(jì)資源： DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7352 (CN0040)
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 12
采樣率（每秒）： 3M
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 45mW
電壓電源： 單電源
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 管件
輸入數(shù)目和類型： 2 個(gè)差分，雙極
產(chǎn)品目錄頁(yè)面： 777 (CN2011-ZH PDF)
AD7352
Rev. A | Page 13 of 20
For ac applications, removing high frequency components from
the analog input signal is recommended by the use of an RC
low-pass filter on the analog input pins. In applications where
harmonic distortion and signal-to-noise ratio are critical, the
analog input should be driven from a low impedance source.
Large source impedances significantly affect the ac perfor-
mance of the ADC and may necessitate the use of an input
buffer amplifier. The choice of the op amp is a function of the
particular application.
When no amplifier is used to drive the analog input, limit
the source impedance to low values. The maximum source
impedance depends on the amount of THD that can be
tolerated. THD increases as the source impedance increases
and performance degrades. Figure 17 shows a graph of THD
vs. the analog input signal frequency for different source
impedances.
–89
–87
–85
–83
–81
–79
–77
–75
–73
–71
–69
–67
–65
100
500
1000
1500
2000
2500
T
HD
(
d
B)
FREQUENCY (kHz)
070
44
-027
100
50
33
10
Figure 17. THD vs. Analog Input Signal Frequency for Various Source
Impedances
Figure 18 shows a graph of the THD vs. the analog input
frequency while sampling at 3 MSPS. In this case, the source
impedance is 33 Ω.
–90
–86
–82
–78
–74
–70
–66
0
1000 2000 3000 4000 5000 6000 7000 8000 9000 10000
T
HD
(
d
B)
ANALOG INPUT FREQUENCY (kHz)
070
44
-028
Figure 18. THD vs. Analog Input Frequency
ANALOG INPUTS
Differential signals have some benefits over single-ended
signals, including noise immunity based on the devices
common-mode rejection and improvements in distortion
performance. Figure 19 defines the fully differential input of
the AD7352.
VIN+
AD7352*
VIN–
VREF p-p
*ADDITIONAL PINS OMITTED FOR CLARITY.
COMMON-MODE
VOLTAGE
07
04
4-
0
39
Figure 19. Differential Input Definition
The amplitude of the differential signal is the difference
between the signals applied to the VIN+ and VIN pins in
each differential pair (VIN+ VIN). VIN+ and VIN should be
simultaneously driven by two signals each of amplitude (VREF)
that are 180° out of phase. This amplitude of the differential
signal is, therefore VREF to +VREF peak-to-peak regardless of
the common mode (CM).
CM is the average of the two signals and is, therefore, the
voltage on which the two inputs are centered.
CM = (VIN+ + VIN)/2
This results in the span of each input being CM ± VREF/2. This
voltage has to be set up externally. When setting up the CM,
ensure that VIN+ and VIN remain within GND/VDD. When
a conversion takes place, CM is rejected, resulting in a virtually
noise-free signal of amplitude, VREF to +VREF, corresponding
to the digital codes of 0 to 4095 for the AD7352.
DRIVING DIFFERENTIAL INPUTS
Differential operation requires VIN+ and VIN to be driven
simultaneously with two equal signals that are 180° out of
phase. Because not all applications have a signal preconditioned
for differential operation, there is often a need to perform a
single-ended-to-differential conversion.
Differential Amplifier
An ideal method of applying differential drive to the AD7352
is to use a differential amplifier such as the AD8138. This part
can be used as a single-ended-to-differential amplifier or as a
differential-to-differential amplifier. The AD8138 also provides
common-mode level shifting. Figure 20 shows how the AD8138
can be used as a single-ended-to-differential amplifier. The
positive and negative outputs of the AD8138 are connected to
the respective inputs on the ADC via a pair of series resistors
to minimize the effects of switched capacitance on the front end
of the ADC. The architecture of the AD8138 results in outputs
that are very highly balanced over a wide frequency range
without requiring tightly matched external components.
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