參數(shù)資料
型號(hào)： AD7008PCB
廠商： Analog Devices, Inc.
元件分類： XO, clock
英文描述： CMOS DDS Modulator
中文描述： 的CMOS DDS調(diào)制器
文件頁數(shù)： 4/16頁
文件大小： 505K
代理商： AD7008PCB
REV. B
–4–
AD7008
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25
°
C unless otherwise noted)
V
AA
, V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Digital I/O Voltage to DGND . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Analog I/O Voltage to AGND . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . .–40
°
C to +85
°
C
Commercial (J Version) . . . . . . . . . . . . . . . . . .0
°
C to +70
°
C
Storage Temperature Range . . . . . . . . . . . . .–65
°
C to +150
°
C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300
°
C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +115
°
C
PLCC
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . +53.8
°
C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . +24.1
°
C/W
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option
Model
AD7008AP20
AD7008JP50
AD7008/PCB*
–40
°
C to +85
°
C
0
°
C to +70
°
C
44-Pin PLCC
44-Pin PLCC
1–3.5" Disk
P-44A
P-44A
*AD7008/PCB DDS Evaluation Kit, assembled and tested. Kit includes an
AD7008JP50.
PIN CONFIGURATION
PLCC
PIN NO. 1 IDENTIFIER
6
40
18
28
7
39
17
29
AD7008 PLCC
TOP VIEW
(NOT TO SCALE)
V
DD
RESET
SLEEP
LOAD
TC3
TC2
TC1
TC0
FSELECT
CLOCK
DGND
V
R
C
F
V
A
I
A
D
S
S
T
I
D
D
D
D
D
D
D
D
D
V
D
C
DGND
D8
D9
D10
D11
D12
D13
D14
D15
V
DD
WR
MSB
LSB
A WORD
D15–D0
←
A WORD*
B WORD
D15–D0
←
B WORD
A WORD
32-BIT PARALLEL ASSEMBLY REGISTER
*MOST SIGNIFICANT WORD IS LOADED FIRST
Figure 5. 16-Bit Parallel Port Loading Sequence
A BYTE
A BYTE
A BYTE
A BYTE
B BYTE
B BYTE
B BYTE
C BYTE
C BYTE
D BYTE
D7–D0
←
A BYTE*
D7–D0
←
B BYTE
D7–D0
←
C BYTE
D7–D0
←
D BYTE
MSB
LSB
32-BIT PARALLEL ASSEMBLY REGISTER
*MOST SIGNIFICANT BYTE IS LOADED FIRST
Figure 6. 8-Bit Parallel Port Loading Sequence
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7008 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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