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參數(shù)資料
| 型號： | AD7008PCB |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | CMOS DDS Modulator |
| 中文描述： | 的CMOS DDS調(diào)制器 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大小： | 505K |
| 代理商： | AD7008PCB |
AD7008–SPECIFICATIONS
1
AD7008AP20
Typ
AD7008JP50
Typ
Test Conditions/
Comments
Parameter
SIGNAL DAC SPECIFICATIONS
Resolution
Update Rate (f
MAX
)
IOUT Full Scale
Output Compliance
DC Accuracy
Integral Nonlinearity
Differential Nonlinearity
DDS SPECIFICATIONS
2
Update Rate (f
MAX
)
Dynamic Specifications
Signal-to-Noise
Min
Max
Min
Max
Units
10
10
Bits
MSPS
mA
Volts
20
50
20
20
1
1
+1
±
1
+1
±
1
LSB
LSB
20
50
MSPS
50
50
dB
f
CLK
= f
MAX
,
f
OUT
= 2 MHz
f
CLK
= f
MAX
,
f
OUT
= 2 MHz
Total Harmonic Distortion
–55
–53
dB
Spurious Free Dynamic Range (SFDR)
3
Narrow Band (
±
50 kHz)
–70
–70
dBc
f
CLK
= 6.25 MHz,
f
OUT
= 2.11 MHz
Wide Band (
±
2 MHz)
VOLTAGE REFERENCE
Internal Reference @ +25
°
C
4
Reference TC
V
REF
Overdrive
5
LOGIC INPUTS
V
INH
, Input High Voltage
V
INL
, Input Low Voltage
I
INH
, Input Current
C
IN
, Input Capacitance
POWER SUPPLIES
V
DD
I
AA
I
DD
I
AA
+ I
DD
f
CLK
= Max
Sleep = V
DD
NOTES
1
Operating temperature ranges as follows: A Version: –40
°
C to +85
°
C; J Version: 0
°
C to +70
°
C.
2
All dynamic specifications are measured using IOUT. 100% Production tested.
3
f
CLK
= 6.25 MHz, Frequency Word = 5671C71C HEX, f
OUT
= 2.11 MHz.
4
V
may be externally driven between 0 and V
.
5
Do not allow reference current to cause power dissipation beyond the limit of I
AA
+ I
DD
shown above.
Specifications subject to change without notice.
–55
–55
dBc
1.2
1.27
300
2
1.35
1.2
1.27
300
2
1.35
Volts
ppm/
°
C
V
0
0
V
DD
–0.9
V
DD
–0.9
Volts
Volts
μ
A
pF
0.9
10
10
0.9
10
10
4.75
5.25
4.75
5.25
Volts
mA
mA
26
22 + 1.5/MHz
26
22 + 1.5/MHz
R
SET
= 390
80
110
10
125
160
20
mA
mA
REV. B
–2–
(V
AA
= V
DD
= +5 V
±
5%; T
A
= T
MIN
to T
MAX
, R
SET
= 390
, R
LOAD
= 1
for
IOUT and
IOUT
, unless otherwise noted)
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